Scalable synchronization of network devices

    公开(公告)号:US11917045B2

    公开(公告)日:2024-02-27

    申请号:US17871937

    申请日:2022-07-24

    CPC classification number: H04L7/0012

    Abstract: In one embodiment, a communication system includes network devices, each comprising a network interface to receive at least one data stream, a given network device being configured to recover a remote clock from the at least one data stream received by the given network device, a frequency synthesizer to generate a clock signal and output the clock signal to each of the network devices, wherein the given network device is configured to find a clock frequency differential between the clock signal and the recovered remote clock, and provide a control signal to the frequency synthesizer responsively to the clock frequency differential, the control signal causes the frequency synthesizer to adjust the clock signal so as to iteratively reduce an absolute value of the clock frequency differential between the clock signal and the recovered remote clock.

    Software-controlled clock synchronization of network devices

    公开(公告)号:US20220191275A1

    公开(公告)日:2022-06-16

    申请号:US17120313

    申请日:2020-12-14

    Abstract: A synchronized communication system includes a plurality of network communication devices, one of which is designated as a root device and the others designated as slave devices. Each network communication device includes one or more ports and communications circuitry, which processes the communication signals received by the one or more ports so as to recover a respective remote clock from each of the signals. A synchronization circuit is integrated in the root device and provides a root clock signal, which is conveyed by clock links to the slave devices. A host processor selects one of the ports of one of the network communication devices to serve as a master port, finds a clock differential between the root clock signal and the respective remote clock recovered from the master port, and outputs, responsively to the clock differential, a control signal causing the synchronization circuit to adjust the root clock signal.

    Software-controlled clock synchronization of network devices

    公开(公告)号:US11606427B2

    公开(公告)日:2023-03-14

    申请号:US17120313

    申请日:2020-12-14

    Abstract: A synchronized communication system includes a plurality of network communication devices, one of which is designated as a root device and the others designated as slave devices. Each network communication device includes one or more ports and communications circuitry, which processes the communication signals received by the one or more ports so as to recover a respective remote clock from each of the signals. A synchronization circuit is integrated in the root device and provides a root clock signal, which is conveyed by clock links to the slave devices. A host processor selects one of the ports of one of the network communication devices to serve as a master port, finds a clock differential between the root clock signal and the respective remote clock recovered from the master port, and outputs, responsively to the clock differential, a control signal causing the synchronization circuit to adjust the root clock signal.

    Clock synchronization using digitally controlled oscillator

    公开(公告)号:US20250055667A1

    公开(公告)日:2025-02-13

    申请号:US18420822

    申请日:2024-01-24

    Abstract: In one embodiment, a system, includes a digitally controlled oscillator (DCO) to generate a local clock signal having a local clock frequency, and a hardware clock to maintain a value indicative of a local clock time advancing at a frequency proportional to the local clock frequency of the local clock signal generated by the DCO, and clock synchronization circuitry to receive from a device an indication of a remote clock time, generate a digital control command to at least partially correct for a difference between the remote clock time and the local clock time, and provide the digital control command to the DCO, wherein the DCO is to adjust the local clock frequency responsively to the digital control command.

    SCALABLE SYNCHRONIZATION OF NETWORK DEVICES
    8.
    发明公开

    公开(公告)号:US20240031121A1

    公开(公告)日:2024-01-25

    申请号:US17871937

    申请日:2022-07-24

    CPC classification number: H04L7/0012

    Abstract: In one embodiment, a communication system includes network devices, each comprising a network interface to receive at least one data stream, a given network device being configured to recover a remote clock from the at least one data stream received by the given network device, a frequency synthesizer to generate a clock signal and output the clock signal to each of the network devices, wherein the given network device is configured to find a clock frequency differential between the clock signal and the recovered remote clock, and provide a control signal to the frequency synthesizer responsively to the clock frequency differential, the control signal causes the frequency synthesizer to adjust the clock signal so as to iteratively reduce an absolute value of the clock frequency differential between the clock signal and the recovered remote clock.

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