公开(公告)号：US20220013488A1

公开(公告)日：2022-01-13

申请号：US17484922

申请日：2021-09-24

申请人： Mahesh K. Kumashikar ,  Dheeraj Subbareddy ,  Ankireddy Nalamalpu ,  MD Altaf Hossain ,  Atul Maheshwari

发明人： Mahesh K. Kumashikar ,  Dheeraj Subbareddy ,  Ankireddy Nalamalpu ,  MD Altaf Hossain ,  Atul Maheshwari

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L23/48 ,  H01L25/00

摘要： An integrated circuit device includes multiple microbumps and a top programmable fabric die including a first programmable fabric and a first microbump interface coupled to the multiple microbumps. The integrated circuit device also includes a base programmable fabric die having a second programmable fabric and a second microbump interface coupled to the first microbump interface via a coupling to the multiple microbumps. The top programmable fabric die and the base programmable fabric die have a same design. Moreover, the top programmable fabric die and the base programmable fabric die are arranged in a three-dimensional die arrangement with the top programmable fabric die flipped above the base programmable fabric die.

公开(公告)号：US20220116041A1

公开(公告)日：2022-04-14

申请号：US17559287

申请日：2021-12-22

申请人： Mahesh K. Kumashikar ,  Ankireddy Nalamalpu ,  MD Altaf Hossain ,  Dheeraj Subbareddy ,  Atul Maheshwari ,  Yuet Li ,  Mahesh A. Iyer

发明人： Mahesh K. Kumashikar ,  Ankireddy Nalamalpu ,  MD Altaf Hossain ,  Dheeraj Subbareddy ,  Atul Maheshwari ,  Yuet Li ,  Mahesh A. Iyer

IPC分类号： H03K19/177

摘要： Systems or methods of the present disclosure may provide efficient electric power consumption of programmable logic devices based on providing different voltage levels to different portions (e.g., voltage islands) of the programmable logic device. For example, the programmable logic device may include circuitry to provide different voltage levels to different voltage islands. The programmable logic device may implement and operate logic configurations with different operating parameters using different operating voltages for efficient electric power consumption.

公开(公告)号：US20220014202A1

公开(公告)日：2022-01-13

申请号：US17485119

申请日：2021-09-24

申请人： Rahul Pal ,  Dheeraj Subbareddy ,  Mahesh Kumashikar ,  Dheemanth Nagaraj ,  Rajesh Vivekanandham ,  Anshuman Thakur ,  Ankireddy Nalamalpu ,  MD Altaf Hossain ,  Atul Maheshwari

发明人： Rahul Pal ,  Dheeraj Subbareddy ,  Mahesh Kumashikar ,  Dheemanth Nagaraj ,  Rajesh Vivekanandham ,  Anshuman Thakur ,  Ankireddy Nalamalpu ,  MD Altaf Hossain ,  Atul Maheshwari

IPC分类号： H03K19/17796 ,  G06F15/78 ,  G06F30/34 ,  H03K19/17758

摘要： The present disclosure is directed to 3-D stacked architecture for Programmable Fabrics and Central Processing Units (CPUs). The 3-D stacked orientation enables reconfigurability of the fabric, and allows the fabric to function using coarse-grained and fine-grained acceleration for offloading CPU processing. Additionally, the programmable fabric may be able to function to interface with multiple other compute chiplet components in the 3-D stacked orientation. This enables multiple compute components to communicate without the need for offloading the data communications between the compute chiplets.

公开(公告)号：US20210326135A1

公开(公告)日：2021-10-21

申请号：US17359039

申请日：2021-06-25

申请人： Dheeraj Subbareddy ,  Anshuman Thakur ,  Ankireddy Nalamalpu ,  MD Altaf Hossain

发明人： Dheeraj Subbareddy ,  Anshuman Thakur ,  Ankireddy Nalamalpu ,  MD Altaf Hossain

IPC分类号： G06F9/30 ,  G06F17/16

摘要： A semiconductor device may include a programmable fabric and a processor. The processor may utilize one or more extension architectures. At least one of these extension architectures may be used to integrate and/or embed the programmable fabric into the processor as part of the processor. Specifically, a buffer of the extension architecture may be used to load data to and store data from the programmable fabric.

公开(公告)号：US20220102281A1

公开(公告)日：2022-03-31

申请号：US17033655

申请日：2020-09-25

申请人： Dheeraj Subbareddy ,  Ankireddy Nalamalpu ,  Lai Guan Tang ,  Mahesh K. Kumashikar

发明人： Dheeraj Subbareddy ,  Ankireddy Nalamalpu ,  Lai Guan Tang ,  Mahesh K. Kumashikar

IPC分类号： H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L23/14

摘要： A digitally communicative circuit may use standardized interfaces for connection and communication with other circuit components. Such digitally communicative circuit may benefit from using wider variety of interconnect schemes with the respective interfaces for transmission and reception of data. Some chiplets may communicate using a high data bandwidth interface while other chiplets may communicate using interfaces with lower data bandwidth. Alternate interface is introduced that may facilitate scaled communication with Advanced Interface Bus 2.0 without translation circuitry and with different data bandwidth.