公开(公告)号：US20190332157A1

公开(公告)日：2019-10-31

申请号：US15963307

申请日：2018-04-26

Applicant: MediaTek Inc.

Inventor： Jih-Ming Hsu ,  Tai-Hua Lu ,  Pei-Yu Huang ,  Chien-Yuan Lai ,  Shu-Hsuan Chou ,  I-Cheng Cheng ,  Yun-Ching Li ,  Ming Hsien Lee

IPC: G06F1/32

Abstract: Power and performance of a multi-core system is managed dynamically by adjusting power table indices at runtime. Runtime statistics is measured, when an application is executed on a first core of a first type at a first operating point (OPP) in a first time period, and on a second core of a second core type at a second OPP in a second time period. A controller estimates, based on the runtime statistics, a first pair of indices associated with a first OPP for the first core and a second pair of indices associated with a second OPP for the second core. During runtime, the controller incorporates the first pair of indices and the second pair of indices into power table indices; and determines, from the power table indices, selected indices associated with a selected OPP of a core of a selected core type for executing the application.

公开(公告)号：US10921876B2

公开(公告)日：2021-02-16

申请号：US15963307

申请日：2018-04-26

Applicant: MediaTek Inc.

Inventor： Jih-Ming Hsu ,  Tai-Hua Lu ,  Pei-Yu Huang ,  Chien-Yuan Lai ,  Shu-Hsuan Chou ,  I-Cheng Cheng ,  Yun-Ching Li ,  Ming Hsien Lee

IPC: G06F1/329 ,  G06F1/3203 ,  G06F1/3209 ,  G06F1/3206

Abstract: Power and performance of a multi-core system is managed dynamically by adjusting power table indices at runtime. Runtime statistics is measured, when an application is executed on a first core of a first type at a first operating point (OPP) in a first time period, and on a second core of a second core type at a second OPP in a second time period. A controller estimates, based on the runtime statistics, a first pair of indices associated with a first OPP for the first core and a second pair of indices associated with a second OPP for the second core. During runtime, the controller incorporates the first pair of indices and the second pair of indices into power table indices; and determines, from the power table indices, selected indices associated with a selected OPP of a core of a selected core type for executing the application.

公开(公告)号：US10509727B1

公开(公告)日：2019-12-17

申请号：US16125780

申请日：2018-09-10

Applicant: MEDIATEK INC.

Inventor： Sheng-Ju Wei ,  Jia-Ming Chen ,  I-Cheng Cheng ,  Shun-Chieh Chang

IPC: G06F12/00 ,  G06F12/0888 ,  G06F12/0875

Abstract: A method and an apparatus for performing task-level cache management in an electronic device are provided. The method may be applied to a processing circuit of the electronic device, and may include: before a task of a plurality of tasks runs on a processor core, performing at least one checking operation on the task to generate at least one checking result, wherein the at least one checking result indicates whether the task is a risky task with risk of evicting cached data of an urgent task from a cache, and the cache is dedicated to a set of processor cores including the processor core; and according to the at least one checking result, determining whether to temporarily limit cache access permission of the processor core during a time period in which the task runs on the processor core, for preventing cache eviction of the cache due to the task.