-
公开(公告)号:US20190123176A1
公开(公告)日:2019-04-25
申请号:US16121730
申请日:2018-09-05
申请人: MEDIATEK Inc.
IPC分类号: H01L29/66 , H01L29/78 , H01L29/417 , H01L27/12 , H01L21/8238 , H01L21/84
摘要: A semiconductor chip includes a substrate and a transistor. The transistor is formed on the substrate and includes an insulation layer and a fin. The fin includes a base portion and a protrusion connected with the base portion, wherein the protrusion is projected with respect to an upper surface of the base portion and has a recess recessed with respect to the upper surface.
-
公开(公告)号:US20230061138A1
公开(公告)日:2023-03-02
申请号:US17816749
申请日:2022-08-02
申请人: MEDIATEK INC.
发明人: Yu-Lin YANG , Ming-Cheng LEE , Yuan-Fu CHUNG
IPC分类号: H01L27/088 , H01L29/423 , H01L29/51 , H01L21/8234
摘要: A semiconductor device structure includes a semiconductor substrate, a first device formed in the first region of the semiconductor substrate and a second device formed in the second region of the semiconductor substrate. The first device includes a first gate structure on the semiconductor substrate. The first gate structure includes a first gate dielectric layer on the semiconductor substrate and a first gate layer on the first gate dielectric layer. The second device includes a second gate structure on the semiconductor substrate. The second gate structure includes a second gate dielectric layer on the semiconductor substrate and a second gate layer on the second gate dielectric layer. The first gate dielectric layer of the first device and the second gate dielectric layer of the second device have different dielectric material compositions.
-
公开(公告)号:US20220406921A1
公开(公告)日:2022-12-22
申请号:US17821195
申请日:2022-08-22
申请人: MEDIATEK Inc.
IPC分类号: H01L29/66 , H01L29/78 , H01L21/84 , H01L27/12 , H01L21/8238 , H01L29/417 , H01L27/088 , H01L21/8234
摘要: A semiconductor chip includes a substrate and a transistor. The transistor is formed on the substrate and includes an insulation layer and a fin. The fin includes a base portion and a protrusion connected with the base portion, wherein the protrusion is projected with respect to an upper surface of the base portion and has a recess recessed with respect to the upper surface.
-
公开(公告)号:US20210135016A1
公开(公告)日:2021-05-06
申请号:US17025095
申请日:2020-09-18
申请人: MEDIATEK INC.
发明人: Cheng-Tien WAN , Ming-Cheng LEE
IPC分类号: H01L29/786 , H01L29/06 , H01L29/423 , H01L29/49 , H01L21/02 , H01L21/28 , H01L29/66
摘要: A semiconductor structure includes several semiconductor stacks over a substrate, and each of the semiconductor stacks extends in a first direction, wherein adjacent semiconductor stacks are spaced apart from each other in a second direction, which is different from the first direction. Each of the semiconductor stacks includes channel layers above the substrate and a gate structure across the channel layers. The channel layers are spaced apart from each other in the third direction. The gate structure includes gate dielectric layers around the respective channel layers, and a gate electrode along sidewalls of the gate dielectric layers and a top surface of the uppermost gate dielectric layer. The space in the third direction between the two lowermost channel layers is greater than the space in the third direction between the two uppermost channel layers in the same semiconductor stack.
-
公开(公告)号:US20160197071A1
公开(公告)日:2016-07-07
申请号:US14861461
申请日:2015-09-22
申请人: MediaTek Inc.
发明人: Chao-Yang YEH , Yi-Feng CHEN , Jia-Wei FANG , Yao-Tsung HUANG , Ming-Cheng LEE
IPC分类号: H01L27/08 , H01L49/02 , H01L21/283
CPC分类号: H01L27/0805 , H01L23/485 , H01L23/5223 , H01L27/0207 , H01L28/86
摘要: The invention provides an integrated circuit device. The integrated circuit device includes a semiconductor substrate. An isolation structure is positioned in the semiconductor substrate. A first electrode and a second electrode are positioned on the semiconductor substrate and coupled to different voltage supplies. The first electrode laterally or parallelly overlaps the second electrode. The first electrode and the second electrode vertically overlap the isolation structure. As a result, leakage current is mitigated or eliminated so that the reliability and performance of the integrated circuit device are improved.
摘要翻译: 本发明提供一种集成电路装置。 集成电路器件包括半导体衬底。 隔离结构位于半导体衬底中。 第一电极和第二电极位于半导体衬底上并耦合到不同的电压源。 第一电极横向或平行地与第二电极重叠。 第一电极和第二电极垂直重叠隔离结构。 结果,泄漏电流被减轻或消除,从而提高了集成电路器件的可靠性和性能。
-
-
-
-