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公开(公告)号:US20240356775A1
公开(公告)日:2024-10-24
申请号:US18637786
申请日:2024-04-17
Applicant: NXP B.V.
Inventor: Bernd Uwe Gerhard Elend , Matthias Berthold Muth
IPC: H04L12/40 , H04L12/403
CPC classification number: H04L12/40078 , H04L12/403 , H04L2012/40215
Abstract: The invention relates to a CAN controller module. The CAN controller module is configured to detect transmission errors during transmissions of bits of a CAN frame via a CAN but and to handle these transmission errors robustly such that a high transmission rate is possible even if the transmission errors occur. The invention also relates to a method for the CAN controller module.
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公开(公告)号:US12028184B2
公开(公告)日:2024-07-02
申请号:US18154983
申请日:2023-01-16
Applicant: NXP B.V.
Inventor: Bernd Uwe Gerhard Elend
IPC: H04L12/40
CPC classification number: H04L12/40013 , H04L12/40026 , H04L2012/40215
Abstract: A CAN module that can be integrated between a CAN controller and a CAN transceiver includes a receive data (RXD), input interface for receiving a first bit sequence through a RXD stream and a RXD output interface for sending a manipulated receive data (MRXD), stream including a second bit sequence. A processing logic of the CAN module is configured to manipulate the first bit sequence to generate a second bit sequence comprising a second stuff bit at a second position in the second bit sequence corresponding to a first position of a first stuff bit in the first bit sequence such that the second stuff bit is complementary to a preceding bit of the second stuff bit in the second bit sequence. The present disclosure also relates to a method for the CAN module.
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公开(公告)号:US20230198799A1
公开(公告)日:2023-06-22
申请号:US18066018
申请日:2022-12-14
Applicant: NXP B.V.
Inventor: Rolf van de Burgt , Bernd Uwe Gerhard Elend , Thierry G. C. Walrant , Dennis aan de Stegge
IPC: H04L12/40
CPC classification number: H04L12/40 , H04L2012/40215
Abstract: An apparatus for a CAN transceiver configured to couple to a CAN bus and generate receive-data based on signals therefrom and generate signals on the CAN bus in response to transmit-data received from a CAN controller, wherein the apparatus is configured to: receive the receive-data comprising a plurality of bits; and for each of one or more bits of the receive-data, sample at a respective sample time to determine a respective value of each of the one or more bits; and with an edge detector determine, during a respective edge detector window, the occurrence of an edge in the receive-data and generate metadata indicative thereof, wherein the edge detector window comprises a period of time that includes the sample time; and wherein the apparatus is configured to determine whether transmit-data is compliant with one or more rules based on the respective values and the metadata.
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公开(公告)号:US11431439B1
公开(公告)日:2022-08-30
申请号:US17301713
申请日:2021-04-12
Applicant: NXP B.V.
Inventor: Bernd Uwe Gerhard Elend , Rolf van de Burgt , Franciscus Johannes Klösters , Thierry G. C. Walrant
IPC: H04L1/00
Abstract: A transceiver for sending and receiving data from a controller area network (CAN) bus is disclosed. The transceiver includes a microcontroller port, a transmitter and a receiver. The transceiver is configured to detect a CRC delimiter or an error signal in a CAN frame and after the detection, allow a microcontroller coupled with the microcontroller port to only send a predetermined data pattern until a bus idle is detected.
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公开(公告)号:US20210400056A1
公开(公告)日:2021-12-23
申请号:US16905901
申请日:2020-06-18
Applicant: NXP B.V.
Inventor: Franciscus Johannes Klösters , Rolf van de Burgt , Thierry G. C. Walrant , Bernd Uwe Gerhard Elend
IPC: H04L29/06 , H04L12/417 , H04L12/40
Abstract: A transceiver for sending and receiving data from a controller area network (CAN) bus is disclosed. The transceiver includes a microcontroller port, a transmitter and a receiver. The transceiver is configured to receive a data frame from a microcontroller via the microcontroller port and to determine if the microcontroller is authorized to send the data frame or part of it based on a message identifier in the data frame and the outcome of the arbitration process. If the microcontroller is unauthorized to send the data, the transceiver is configured to invalidate the data frame and disconnect the microcontroller from the CAN bus for a predetermined period.
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公开(公告)号:US10326453B2
公开(公告)日:2019-06-18
申请号:US15841225
申请日:2017-12-13
Applicant: NXP B.V.
Inventor: Thierry G. C. Walrant , Bernd Uwe Gerhard Elend , Andreas Bening
Abstract: The present application relates to a system hosting a monotonic counter and a method of operating the system. The system comprises a non-volatile memory (110) for holding a save counter value and a volatile memory (120) for maintaining a current counter value. The system (100) is configured during a startup phase to retrieve the saved counter value of the monotonic counter from the non-volatile memory (110); to detect whether a previous shutdown of the system (100) was an uncontrolled shutdown; and to adjust the retrieved counter value in accordance with a step size (130) provided at the system (100) in case an previous uncontrolled shutdown is detected.
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公开(公告)号:US11714772B2
公开(公告)日:2023-08-01
申请号:US17660393
申请日:2022-04-22
Applicant: NXP B.V.
CPC classification number: G06F13/4027 , G06F13/385 , G06F13/4204
Abstract: A communication device is configured to exchange regular data bidirectionally with counterpart communication device via a regular interface; and to exchange additional data bidirectionally with the counterpart device via an additional interface. The device has a regular pinout corresponding to the regular interface that enables communication of regular data with the counterpart device; and an additional pinout with at least one additional pin, corresponding to the additional interface that enables communication of additional data with the counterpart device. The device has default data handling circuitry communicatively coupled to the additional pin, and configured, in a default mode, to transmit and receive additional default data via the additional pin. The first device has additional function data handling circuitry communicatively coupled to the additional pin and configured, in an active mode, to transmit and receive additional function data via the additional interface.
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公开(公告)号:US20230231737A1
公开(公告)日:2023-07-20
申请号:US18154983
申请日:2023-01-16
Applicant: NXP B.V.
Inventor: Bernd Uwe Gerhard Elend
IPC: H04L12/40
CPC classification number: H04L12/40013 , H04L12/40026 , H04L2012/40215
Abstract: A CAN module that can be integrated between a CAN controller and a CAN transceiver includes a receive data (RXD), input interface for receiving a first bit sequence through a RXD stream and a RXD output interface for sending a manipulated receive data (MRXD), stream including a second bit sequence. A processing logic of the CAN module is configured to manipulate the first bit sequence to generate a second bit sequence comprising a second stuff bit at a second position in the second bit sequence corresponding to a first position of a first stuff bit in the first bit sequence such that the second stuff bit is complementary to a preceding bit of the second stuff bit in the second bit sequence. The present disclosure also relates to a method for the CAN module.
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9.
公开(公告)号:US11671455B2
公开(公告)日:2023-06-06
申请号:US16575243
申请日:2019-09-18
Applicant: NXP B.V.
Inventor: Bernd Uwe Gerhard Elend , Donald Robert Pannell , Steffen Mueller , Philip Axer
CPC classification number: H04L63/20 , H04L63/10 , H04L63/105 , H04L63/162 , H04L69/22
Abstract: Embodiments of a device and method are disclosed. In an embodiment, an Ethernet communications device includes a physical layer (PHY) unit or a media access control (MAC) unit configured to perform media access control for the Ethernet communications device. The Ethernet communications device includes a security unit configured to manipulate a data stream in a data path within the Ethernet communications device when the data stream violates or conforms to a pre-defined policy.
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公开(公告)号:US20220342839A1
公开(公告)日:2022-10-27
申请号:US17660393
申请日:2022-04-22
Applicant: NXP B.V.
Abstract: A communication device is configured to exchange regular data bidirectionally with counterpart communication device via a regular interface; and to exchange additional data bidirectionally with the counterpart device via an additional interface. The device has a regular pinout corresponding to the regular interface that enables communication of regular data with the counterpart device; and an additional pinout with at least one additional pin, corresponding to the additional interface that enables communication of additional data with the counterpart device. The device has default data handling circuitry communicatively coupled to the additional pin, and configured, in a default mode, to transmit and receive additional default data via the additional pin. The first device has additional function data handling circuitry communicatively coupled to the additional pin and configured, in an active mode, to transmit and receive additional function data via the additional interface.
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