公开(公告)号：US08679963B2

公开(公告)日：2014-03-25

申请号：US13916430

申请日：2013-06-12

Applicant: NXP B.V.

Inventor： Jan Gulpen ,  Tonny Kamphuis ,  Pieter Hochstenbach ,  Leo Van Gemert ,  Eric Van Grunsven ,  Marc De Samber

IPC: H01L21/44 ,  H01L23/48

CPC classification number: H01L24/11 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L24/19 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/92144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/01092 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00

Abstract: A chip scale package has a semiconductor die having an array of die bond pads arranged with a bond pad density per unit area, embedded in a molded die support body having a surface supporting an array of conducting contacts, each of the contacts connected by an electrical lead to a corresponding one of the die bond pads.

Abstract translation: 芯片级封装具有半导体管芯，其具有以每单位面积的焊盘密度排列的管芯接合焊盘的阵列，嵌入在具有支撑导电触头阵列的表面的模制模具支撑体中，每个触点通过电连接 导致相应的一个管芯接合焊盘。