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公开(公告)号:US20190232438A1
公开(公告)日:2019-08-01
申请号:US16223952
申请日:2018-12-18
发明人: HIROHISA HINO , NAOMICHI OHASHI , YASUHIRO SUZUKI , KOSO MATSUNO
CPC分类号: B23K35/362 , B23K35/025 , B23K35/262 , B23K2101/40 , B23K2101/42 , C22C13/02 , H01L24/16 , H01L24/81 , H01L2224/16227 , H01L2224/16501 , H01L2224/81815 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01083 , H01L2924/014 , H01L2924/0665 , H01L2924/069 , H05K1/181 , H05K3/3436 , H05K3/3457 , H05K3/3494 , H05K2201/10636 , H05K2201/10734
摘要: Provided herein is a solder paste having low viscosity and easy coatability, and that provides high reinforcement for electronic components while satisfying both high room-temperature adhesion and high repairability, and forming a cured product of excellent properties, for example, high insulation against humidity. Amount structure including an electronic component mounted with the solder paste is also provided. The solder paste contains a solder powder and a flux. The flux contains an epoxy resin, a reactive diluent, a curing agent, an organic acid, and a rubber modified epoxy resin. The reactive diluent contains a compound having two or more epoxy groups, and has a viscosity of 150 mPa·s or more and 700 mPa·s or less. The reactive diluent has a total chlorine content of 0.5 weight % or less, and is contained in a proportion of 5 weight % or more and 45 weight % or less with respect to a total weight of the flux.
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公开(公告)号:US20190027455A1
公开(公告)日:2019-01-24
申请号:US16137683
申请日:2018-09-21
发明人: SHINYA SUZUKI , Kiichi Makuta
IPC分类号: H01L23/00 , H01L23/522 , H01L23/528 , H01L27/02 , H01L23/498
CPC分类号: H01L24/17 , G02F1/13306 , G02F1/13452 , H01L23/49811 , H01L23/5226 , H01L23/528 , H01L23/53209 , H01L23/53214 , H01L23/53238 , H01L23/5329 , H01L24/10 , H01L24/13 , H01L24/14 , H01L27/0207 , H01L27/0248 , H01L27/0255 , H01L27/0292 , H01L2224/05124 , H01L2224/05166 , H01L2224/05184 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/13 , H01L2224/13099 , H01L2224/13144 , H01L2224/13644 , H01L2224/1403 , H01L2224/1412 , H01L2224/16 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/81191 , H01L2224/9211 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01025 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01041 , H01L2924/01042 , H01L2924/01044 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01055 , H01L2924/01057 , H01L2924/01059 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/013 , H01L2924/04941 , H01L2924/10161 , H01L2924/14 , H01L2924/1426 , H01L2924/15788 , H01L2924/30105 , H01L2924/00 , H01L2924/00014
摘要: To provide a technique capable of reducing the chip size of a semiconductor chip and particularly, a technique capable of reducing the chip size of a semiconductor chip in the form of a rectangle that constitutes an LCD driver by devising a layout arrangement in a short-side direction. In a semiconductor chip that constitutes an LCD driver, input protection circuits are arranged in a lower layer of part of a plurality of input bump electrodes and on the other hand, in a lower layer of the other part of the input bump electrodes, the input protection circuits are not arranged but SRAMs (internal circuits) are arranged.
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公开(公告)号:US10062657B2
公开(公告)日:2018-08-28
申请号:US15518219
申请日:2015-10-09
发明人: Shoya Iuchi , Masaru Hatabe
CPC分类号: H01L24/11 , H01L24/13 , H01L2224/0345 , H01L2224/0346 , H01L2224/0347 , H01L2224/0401 , H01L2224/05568 , H01L2224/05655 , H01L2224/11462 , H01L2224/1147 , H01L2224/11848 , H01L2224/11849 , H01L2224/11901 , H01L2224/13023 , H01L2224/13082 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13118 , H01L2224/13139 , H05K3/34 , H01L2924/014 , H01L2924/01049 , H01L2924/0105 , H01L2924/01083 , H01L2924/01047
摘要: In order to manufacture an alloy bump, a resist pattern having openings which expose a substrate is formed on the substrate, an under-bump metal is formed on the substrate inside the openings, a first plating film is formed on the under-bump metal by electroplating, a second plating film containing no metal components which are contained in the first plating film is formed on the first plating film by electroplating, the resist pattern is removed, and the alloy bump is formed by heat treating the substrate to thereby alloy the first plating film and the second plating film.
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公开(公告)号:US20180233448A1
公开(公告)日:2018-08-16
申请号:US15951925
申请日:2018-04-12
申请人: Invensas Corporation
发明人: Ilyas Mohammed
IPC分类号: H01L23/522 , H01L25/10 , H01L25/065 , H01L23/00 , H01L23/538 , H01L21/768 , H01L21/56 , H05K3/40
CPC分类号: H01L23/5226 , H01L21/563 , H01L21/568 , H01L21/76877 , H01L21/76892 , H01L23/5389 , H01L24/06 , H01L24/18 , H01L24/19 , H01L24/20 , H01L24/45 , H01L24/49 , H01L24/96 , H01L25/0657 , H01L25/105 , H01L2224/04042 , H01L2224/04105 , H01L2224/32145 , H01L2224/32245 , H01L2224/45101 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/45565 , H01L2224/45624 , H01L2224/45655 , H01L2224/45664 , H01L2224/45669 , H01L2224/4569 , H01L2224/48 , H01L2224/49 , H01L2224/73267 , H01L2225/06524 , H01L2225/06548 , H01L2225/06558 , H01L2225/1035 , H01L2225/1052 , H01L2225/1058 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/182 , H01L2924/191 , H01L2924/19107 , H05K3/4046 , H05K2201/10287 , H05K2203/1461 , H01L2924/00 , H01L2924/014 , H01L2924/01049
摘要: A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are unconvered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.
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公开(公告)号:US10010980B2
公开(公告)日:2018-07-03
申请号:US14697717
申请日:2015-04-28
发明人: Kosuke Nakano , Hidekiyo Takaoka
IPC分类号: B23K35/02 , B23K1/00 , B23K35/26 , C22C9/05 , C22C9/06 , C22C13/00 , H01L23/00 , H05K3/34 , B23K35/36 , B23K35/362 , B23K101/40
CPC分类号: B23K35/025 , B23K1/00 , B23K1/0016 , B23K35/262 , B23K35/3613 , B23K35/362 , B23K2101/40 , C22C9/05 , C22C9/06 , C22C13/00 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/81 , H01L24/83 , H01L2224/0401 , H01L2224/04026 , H01L2224/05155 , H01L2224/05644 , H01L2224/1132 , H01L2224/11332 , H01L2224/1329 , H01L2224/13294 , H01L2224/13311 , H01L2224/13347 , H01L2224/16503 , H01L2224/16507 , H01L2224/2732 , H01L2224/29101 , H01L2224/29109 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29294 , H01L2224/29311 , H01L2224/29347 , H01L2224/32503 , H01L2224/32507 , H01L2224/81192 , H01L2224/81211 , H01L2224/81447 , H01L2224/81815 , H01L2224/83192 , H01L2224/83211 , H01L2224/83447 , H01L2224/83815 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01052 , H01L2924/01057 , H01L2924/01059 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/01327 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H05K3/3484 , H05K2201/0215 , H05K2201/0272 , Y10T403/479 , Y10T428/31678 , H01L2924/01028 , H01L2924/00014 , H01L2924/00 , H01L2924/01014 , H01L2924/01015 , H01L2924/01026 , H01L2924/01027 , H01L2924/01046 , H01L2924/01083 , H01L2924/00015 , H01L2924/00012
摘要: A solder paste including a metal component consisting of a first metal powder and a second metal powder having a melting point higher than that of the first metal, and a flux component. The first metal is Sn or an alloy containing Sn, the second metal is one of (1) a Cu—Mn alloy in which a ratio of Mn to the second metal is 5 to 30% by weight and (2) a Cu—Ni alloy in which a ratio of Ni to the second metal is 5 to 20% by weight, and a ratio of the second metal to the metal component is 36.9% by volume or greater.
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公开(公告)号:US20180182733A1
公开(公告)日:2018-06-28
申请号:US15905408
申请日:2018-02-26
IPC分类号: H01L23/00 , H01L25/065 , H01L25/10 , H01L25/00
CPC分类号: H01L24/81 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/48 , H01L24/75 , H01L25/03 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/1134 , H01L2224/1145 , H01L2224/11462 , H01L2224/13082 , H01L2224/131 , H01L2224/13109 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13624 , H01L2224/16148 , H01L2224/16225 , H01L2224/16238 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/75251 , H01L2224/75252 , H01L2224/75301 , H01L2224/75343 , H01L2224/75348 , H01L2224/75349 , H01L2224/75744 , H01L2224/75745 , H01L2224/759 , H01L2224/8112 , H01L2224/81121 , H01L2224/81193 , H01L2224/81201 , H01L2224/81203 , H01L2224/81205 , H01L2224/81207 , H01L2224/81409 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/818 , H01L2224/81801 , H01L2224/81895 , H01L2224/81906 , H01L2225/06513 , H01L2225/1023 , H01L2225/1058 , H01L2924/01047 , H01L2924/01049 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2924/20102 , H01L2924/20103 , H01L2924/20104 , H01L2924/20105 , H01L2924/20106 , H01L2924/20107 , H01L2924/20301 , H01L2924/20302 , H01L2924/20303 , H01L2924/20304 , H01L2924/20305 , H01L2924/20306 , H01L2924/20307 , H01L2924/00014 , H01L2924/01029 , H01L2924/01014 , H01L2924/00012 , H01L2924/014 , H01L2224/8121 , H01L2924/00
摘要: A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element, wherein the surfaces of each of the plurality of first conductive structures and the plurality of second conductive structures include aluminum; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures.
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公开(公告)号:US20180182724A1
公开(公告)日:2018-06-28
申请号:US15904812
申请日:2018-02-26
CPC分类号: H01L24/11 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L2224/0345 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05005 , H01L2224/05022 , H01L2224/05124 , H01L2224/05139 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05541 , H01L2224/05552 , H01L2224/05562 , H01L2224/05572 , H01L2224/05647 , H01L2224/1145 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/13005 , H01L2224/13022 , H01L2224/1308 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2224/16237 , H01L2924/00014 , H01L2924/01012 , H01L2924/01029 , H01L2924/04941 , H01L2924/04953 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/206 , H01L2924/381 , H01L2924/01047 , H01L2924/01024 , H01L2924/01028 , H01L2924/0105 , H01L2924/01079 , H01L2924/01073 , H01L2924/01049 , H01L2924/0103 , H01L2924/01025 , H01L2924/01022 , H01L2924/01032 , H01L2924/01078 , H01L2924/01013 , H01L2924/0104 , H01L2924/01082 , H01L2924/01046 , H01L2924/01083 , H01L2924/01051 , H01L2924/00
摘要: A packaging assembly includes a semiconductor device. The semiconductor device includes a conductive pad having a first width, and an under-bump metallization (UBM) layer on the conductive pad, wherein the UBM layer has a second width greater than the first width. The semiconductor device further includes a conductive pillar on the UBM layer, and a cap layer over the conductive pillar, wherein the cap layer exposes sidewalls of the UBM layer. The packaging assembly further includes a substrate. The substrate includes a conductive region, and a mask layer overlying the substrate and exposing a portion of the conductive region. The packaging assembly further includes a joint solder structure between the conductive pillar and the conductive region.
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公开(公告)号:US20180159503A1
公开(公告)日:2018-06-07
申请号:US15828637
申请日:2017-12-01
发明人: Atsushi Takano
IPC分类号: H03H9/10 , H03H3/02 , H03H9/17 , H03H9/05 , H01L41/313 , H01L41/337 , H01L41/338 , H01L23/00
CPC分类号: H03H9/1035 , B23K1/0016 , B23K20/16 , B23K26/382 , B23K26/402 , B23K2101/36 , B23K2101/42 , B23K2103/172 , H01L21/187 , H01L24/83 , H01L24/94 , H01L25/0657 , H01L41/313 , H01L41/337 , H01L41/338 , H01L2224/83096 , H01L2224/8312 , H01L2224/83825 , H01L2924/01029 , H01L2924/01049 , H01L2924/0105 , H01L2924/01079 , H03H3/02 , H03H9/0523 , H03H9/17 , H03H9/171 , H03H9/173 , H03H9/175 , H03H9/706 , H03H2003/021
摘要: An electronic device, such as a filter, includes a first substrate having a bottom surface and a top surface, a first side wall of a certain height being formed along a periphery of the bottom surface to surround an electronic circuit disposed on the bottom surface, an external electrode formed on the top surface, the external electrode being connected to the electronic circuit by a via communicating with the bottom surface and a second substrate. The second substrate has a second side wall of a certain height formed along a periphery of a top surface, the second side wall being aligned and bonded with the first side wall to internally form a cavity defined between the bottom surface of the first substrate, the top surface of the second substrate, the first side wall, and the second side wall.
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公开(公告)号:US20180132393A1
公开(公告)日:2018-05-10
申请号:US15670005
申请日:2017-08-07
发明人: Eric Frank Schulte
CPC分类号: H05K13/046 , B32B38/0008 , B32B2310/14 , B32B2457/00 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L25/50 , H01L2224/0381 , H01L2224/0401 , H01L2224/05552 , H01L2224/05557 , H01L2224/05568 , H01L2224/05655 , H01L2224/11334 , H01L2224/1181 , H01L2224/11831 , H01L2224/13099 , H01L2224/131 , H01L2224/13105 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/1312 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/16145 , H01L2224/81011 , H01L2224/81013 , H01L2224/81054 , H01L2224/81099 , H01L2224/81191 , H01L2224/81193 , H01L2224/812 , H01L2224/81201 , H01L2224/81365 , H01L2224/81895 , H01L2224/81897 , H01L2225/06513 , H01L2225/06565 , H01L2924/00 , H01L2924/0001 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2924/1431 , H01L2924/1461
摘要: Methods and systems for low-force, low-temperature thermocompression bonding. The present application teaches new methods and structures for three-dimensional integrated circuits, in which cold thermocompression bonding is used to provide reliable bonding. To achieve this, reduction and passivation steps are preferably both used to reduce native oxide on the contact metals and to prevent reformation of native oxide, preferably using atmospheric plasma treatments. Preferably the physical compression height of the elements is set to be only enough to reliably achieve at least some compression of each bonding element pair, compensating for any lack of flatness. Preferably the thermocompression bonding is performed well below the melting point. This not only avoids the deformation of lower levels which is induced by reflow techniques, but also provides a steep relation of force versus z-axis travel, so that a drastically-increasing resistance to compression helps to regulate the degree of thermocompression.
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公开(公告)号:US09950393B2
公开(公告)日:2018-04-24
申请号:US13976001
申请日:2011-12-23
IPC分类号: B23K35/02 , B23K35/362 , H01L23/00 , H05K3/34 , H01L23/488 , H01L23/498 , H01L21/48
CPC分类号: B23K35/025 , B23K35/362 , H01L21/4853 , H01L23/488 , H01L23/49816 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0381 , H01L2224/03828 , H01L2224/03829 , H01L2224/03849 , H01L2224/0401 , H01L2224/05794 , H01L2224/058 , H01L2224/05809 , H01L2224/05811 , H01L2224/05813 , H01L2224/05817 , H01L2224/05839 , H01L2224/05844 , H01L2224/11334 , H01L2224/11848 , H01L2224/11849 , H01L2224/119 , H01L2224/131 , H01L2924/00014 , H01L2924/01049 , H01L2924/3511 , H01L2924/3841 , H05K3/3489 , H05K2203/041 , H05K2203/046 , H01L2924/014 , H01L2924/01032 , H01L2924/01105 , H01L2924/00012 , H01L2924/01047 , H01L2924/01029 , H01L2924/0105 , H01L2924/0103 , H01L2924/01083
摘要: Flux formulations and solder attachment during the fabrication of electronic device assemblies are described. One flux formation includes a flux component and a metal particle component, the metal particle component being present in an amount of from 5 to 35 volume percent of the flux formulation. In one feature of certain embodiments, the metal particle component includes solder particles. Other embodiments are described and claimed.
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