公开(公告)号：US11784000B2

公开(公告)日：2023-10-10

申请号：US17472490

申请日：2021-09-10

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Kazushi Yoshida ,  Yosuke Hagihara ,  Takumi Taura

IPC: H01G4/008

CPC classification number: H01G4/008

Abstract: A capacitor includes a silicon substrate, a conductor layer, and a dielectric layer. The silicon substrate has a principal surface including a capacitance generation region and a non-capacitance generation region. The silicon substrate has a porous part provided in a thickness direction in the capacitance generation region. The conductor layer has a surface layer part at least covering part of a surface of the capacitance generation region and a filling part filled in at least part of fine pores of the porous part. The dielectric layer is provided between an inner surface of the fine pores and the filling part.

公开(公告)号：US11948995B2

公开(公告)日：2024-04-02

申请号：US17911077

申请日：2021-01-22

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Kazushi Yoshida ,  Yosuke Hagihara

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/94

CPC classification number: H01L29/66181 ,  H01L29/0665 ,  H01L29/945

Abstract: A capacitor includes a silicon substrate, a conductor layer, and a dielectric layer. The silicon substrate has a principal surface including a capacitance generation region and a non-capacitance generation region. The silicon substrate includes a porous part provided in a thickness direction in the capacitance generation region. The conductor layer includes a surface layer part at least covering part of a surface of the capacitance generation region and a filling part filled in at least part of the porous part. The dielectric layer is provided between an inner surface of the porous part and the filling part. The porous part includes a macroporous part having macro pores and a nanoporous part formed in at least part of inner surfaces of the macro pores and having nano pores smaller than the macro pores.

公开(公告)号：US10476102B2

公开(公告)日：2019-11-12

申请号：US15522325

申请日：2015-12-09

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Takeshi Fujii ,  Koji Sakai ,  Kazushi Yoshida ,  Yoshiya Sakaguchi ,  Yuuichi Abe

IPC: H01M10/0525 ,  H01M10/48 ,  H01M10/617 ,  H01M10/613 ,  H01G11/32 ,  H01G17/00 ,  H01M4/133 ,  H01G11/08 ,  H01M10/0585 ,  H01M10/6551

Abstract: A battery includes a case, at least one of a first battery cell and a second battery cell disposed in the case, and a graphite sheet disposed at at least one of a position between the case and the first battery cell and a position between the first battery cell and the second battery cell. The graphite sheet has a terminal portion for taking out an electrical signal.

公开(公告)号：US20210407734A1

公开(公告)日：2021-12-30

申请号：US17472490

申请日：2021-09-10

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Kazushi Yoshida ,  Yosuke Hagihara ,  Takumi Taura

IPC: H01G4/008

Abstract: A capacitor includes a silicon substrate, a conductor layer, and a dielectric layer. The silicon substrate has a principal surface including a capacitance generation region and a non-capacitance generation region. The silicon substrate has a porous part provided in a thickness direction in the capacitance generation region. The conductor layer has a surface layer part at least covering part of a surface of the capacitance generation region and a filling part filled in at least part of fine pores of the porous part. The dielectric layer is provided between an inner surface of the fine pores and the filling part.