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公开(公告)号:US20210407734A1
公开(公告)日:2021-12-30
申请号:US17472490
申请日:2021-09-10
Inventor: Kazushi Yoshida , Yosuke Hagihara , Takumi Taura
IPC: H01G4/008
Abstract: A capacitor includes a silicon substrate, a conductor layer, and a dielectric layer. The silicon substrate has a principal surface including a capacitance generation region and a non-capacitance generation region. The silicon substrate has a porous part provided in a thickness direction in the capacitance generation region. The conductor layer has a surface layer part at least covering part of a surface of the capacitance generation region and a filling part filled in at least part of fine pores of the porous part. The dielectric layer is provided between an inner surface of the fine pores and the filling part.
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公开(公告)号:US10989603B2
公开(公告)日:2021-04-27
申请号:US16486473
申请日:2018-02-15
Inventor: Katsumi Kakimoto , Takafumi Okudo , Yosuke Hagihara , Akira Matsuura
Abstract: The disclosure has a configuration including: a supporting substrate having a cavity; at least one bridge section extending directly above the cavity and having at least one end supported by the supporting substrate and an other end; and a thermopile wiring formed in the bridge section and including hot junctions in the bridge section and cold junctions directly above the supporting substrate, the hot junctions being connected to the cold junctions. The bridge section is provided with: at least one breakage detection wiring for detecting breakage of the bridge section; and at least one heater wiring. The breakage detection wiring is wired along the thermopile wiring. The heater wiring is wired such that part of the heater wiring is in an area between the other end of the bridge section and the hot junctions.
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公开(公告)号:US11948995B2
公开(公告)日:2024-04-02
申请号:US17911077
申请日:2021-01-22
Inventor: Kazushi Yoshida , Yosuke Hagihara
CPC classification number: H01L29/66181 , H01L29/0665 , H01L29/945
Abstract: A capacitor includes a silicon substrate, a conductor layer, and a dielectric layer. The silicon substrate has a principal surface including a capacitance generation region and a non-capacitance generation region. The silicon substrate includes a porous part provided in a thickness direction in the capacitance generation region. The conductor layer includes a surface layer part at least covering part of a surface of the capacitance generation region and a filling part filled in at least part of the porous part. The dielectric layer is provided between an inner surface of the porous part and the filling part. The porous part includes a macroporous part having macro pores and a nanoporous part formed in at least part of inner surfaces of the macro pores and having nano pores smaller than the macro pores.
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公开(公告)号:US10119865B2
公开(公告)日:2018-11-06
申请号:US14895927
申请日:2014-05-30
Inventor: Katsumi Kakimoto , Masaaki Saito , Yosuke Hagihara , Takafumi Okudo , Yoichi Nishijima , Ryo Osabe , Naoki Ushiyama , Sumio Akai , Yasufumi Shibata
Abstract: An infrared sensor, which achieves a low manufacturing cost, or has high sensitivity, or in which an increase in heat capacity is reduced, is provided. The infrared sensor includes a first infrared absorbing portion, an infrared sensing portion for sensing infrared rays based on infrared rays absorbed by the first infrared absorbing portion, and a plurality of protrusions including metal and disposed apart from each other on a surface of the first infrared absorbing portion. Since an absorption rate of infrared rays is improved, sensitivity can be improved, or an increase in heat capacity can be reduced.
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公开(公告)号:US11784000B2
公开(公告)日:2023-10-10
申请号:US17472490
申请日:2021-09-10
Inventor: Kazushi Yoshida , Yosuke Hagihara , Takumi Taura
IPC: H01G4/008
CPC classification number: H01G4/008
Abstract: A capacitor includes a silicon substrate, a conductor layer, and a dielectric layer. The silicon substrate has a principal surface including a capacitance generation region and a non-capacitance generation region. The silicon substrate has a porous part provided in a thickness direction in the capacitance generation region. The conductor layer has a surface layer part at least covering part of a surface of the capacitance generation region and a filling part filled in at least part of fine pores of the porous part. The dielectric layer is provided between an inner surface of the fine pores and the filling part.
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