公开(公告)号：US20190107569A1

公开(公告)日：2019-04-11

申请号：US15730486

申请日：2017-10-11

Applicant: QUALCOMM Incorporated

Inventor： David Kidd ,  Ardavan Moassessi ,  Angelo Pinto ,  Albert Kumar ,  Yi Lou ,  Bipin Duggal ,  Amar Gulhane ,  Michael Bourland ,  Mustafa Badaroglu ,  Paul Penzes

IPC: G01R31/02 ,  G01R31/28 ,  G01R31/36 ,  H01L21/66

Abstract: Aspects of the disclosure includes a transistor-under-test (TUT) to charge/discharge a capacitor; changing an oscillation state when a capacitor voltage crosses a threshold and turning OFF the TUT; discharging the capacitor using the TUT; commencing precharging the capacitor after detecting the capacitor reaches a transition voltage; commencing discharging the capacitor after a precharger time delay; sustaining a relaxation oscillator waveform, wherein the relaxation oscillator waveform is based on turning OFF/ON the TUT; and generating a digital representation of a TUT current associated with a relaxation oscillator period of the relaxation oscillator waveform. For example, a measurement tile includes a pulse generator to sustain the relaxation oscillator waveform with the relaxation oscillator period associated with an inverse TUT current; and a precharger charging a capacitor and the TUT charging/discharging the capacitor, wherein the relaxation oscillator waveform is based on turning OFF/ON the TUT in accordance with discharging and charging the capacitor.

公开(公告)号：US11929325B2

公开(公告)日：2024-03-12

申请号：US17405860

申请日：2021-08-18

Applicant: QUALCOMM Incorporated

Inventor： Luca Mattii ,  Sidharth Rastogi ,  Ranganayakulu Konduri ,  Gerard Patrick Baldwin ,  Angelo Pinto

IPC: H01L21/00 ,  H01L23/528

CPC classification number: H01L23/5286

Abstract: Routing layers, e.g., back-end of line (BEOL) routing layers, of a semiconductor device are disclosed. Unlike conventional routing layers, the proposed routing layers include mixed pitch track patterns. As such, routing layers with reduced resistance-capacitance (RC) and low routing cost may be achieved.