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公开(公告)号:US10671139B2
公开(公告)日:2020-06-02
申请号:US15609741
申请日:2017-05-31
Applicant: QUANTA COMPUTER INC.
Inventor: Jen-Hsuen Huang , Fa-Da Lin , Yi-Ping Lin
Abstract: The present disclosure provides a system and method for providing a basic power to a system in an event that a standby power of power supply units (PSUs) of the system fails. The system comprises a plurality of active components, one or more PSUs, and a power switch. The power switch is connected to a standby power output and a main power output of the PSUs. The power switch can receive status information of the PSUs and determine whether the main power of the PSUs is within a predetermined range. In an event that the standby power of the PSUs fails and the main power of the PSUs is within the predetermined range, the power switch can switch an input power from the standby power to the main power of the PSUs and output a basic power for system use.
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公开(公告)号:US10664030B2
公开(公告)日:2020-05-26
申请号:US15855790
申请日:2017-12-27
Applicant: QUANTA COMPUTER INC.
Inventor: Jen-Hsuen Huang , Fa-Da Lin , Yi-Ping Lin
IPC: G06F1/26 , G06F1/28 , G06F1/3203 , G06F1/3206 , G06F11/30
Abstract: A system and method to dynamically balance power to a multi-node system is disclosed. A chassis management controller is operable to regulate the power from a power source to each of the nodes. The chassis management controller determines a setting power for each nodes and a real power consumed by each node. The chassis management controller determines a next setting power for each node based on the real power and unused total power and total additional balance power for the plurality of nodes. The chassis management controller commands each node to regulate the power consumption of the node up to the setting power value.
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公开(公告)号:US10592462B2
公开(公告)日:2020-03-17
申请号:US16012015
申请日:2018-06-19
Applicant: QUANTA COMPUTER INC.
Inventor: Jen-Hsuen Huang , Fa-Da Lin , Yi-Ping Lin
Abstract: A computing device configured to detect proper cable assembly to improve assembly and problem diagnosis is provided. The computing device includes a motherboard, a function board, and a middle plane connecting the motherboard and function board. The motherboard includes a baseboard management controller (BMC). The BMC is connected to I2C buses. The function board includes integrated circuits. The middle plane includes cable connections interconnecting the I2C buses that are connected to the BMC and the integrated circuits. The integrated circuits have unique system addresses that are identifiable by the BMC.
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