公开(公告)号：US11783910B2

公开(公告)日：2023-10-10

申请号：US17720054

申请日：2022-04-13

Applicant: Rambus Inc.

Inventor： Adrian E. Ong ,  Fan Ho

IPC: G11C29/00 ,  G11C29/44 ,  G11C29/48 ,  G11C29/04 ,  G11C11/401 ,  G11C29/12 ,  G11C11/408 ,  G11C29/02

CPC classification number: G11C29/76 ,  G11C11/401 ,  G11C11/4085 ,  G11C29/027 ,  G11C29/04 ,  G11C29/12 ,  G11C29/4401 ,  G11C29/48 ,  G11C29/78 ,  G11C29/802 ,  G11C29/789 ,  G11C2229/743

Abstract: A dynamic random access memory (DRAM) comprises a plurality of primary data storage elements, a plurality of redundant data storage elements, and circuitry to receive a first register setting command and initiate a repair mode in the DRAM in response to the first register setting command. The circuitry is further to receive an activation command, repair a malfunctioning row address in the DRAM, receive a precharge command, receive a second register setting command, terminate the repair mode in the DRAM in response to the second register setting command, receive a memory access request for data stored at the malfunctioning row address, and redirect the memory access request to a corresponding row address in the plurality of redundant data storage elements.

公开(公告)号：US11270931B2

公开(公告)日：2022-03-08

申请号：US15893491

申请日：2018-02-09

Applicant: Rambus Inc.

Inventor： Adrian E. Ong ,  Dong Sik Jeong

IPC: H01L23/538 ,  H01L23/50 ,  H01L21/48

Abstract: Methods, systems, and apparatus for reducing power consumption or signal distortions in a semiconductor device package. The semiconductor device package includes a semiconductor device, a first electric path, a second electric path, and an isolation element in the first electric path. The second electric path is electrically connected to the first electric path and a functional unit of the device. The isolation element separates an isolated portion in the first electric path from the second electric path, where the isolation element is configured to reduce current in the isolated portion when a signal is passing through the second electric path.

公开(公告)号：US20210407619A1

公开(公告)日：2021-12-30

申请号：US17344155

申请日：2021-06-10

Applicant: Rambus Inc.

Inventor： Adrian E. Ong ,  Fan Ho

IPC: G11C29/00 ,  G11C29/44 ,  G11C29/48 ,  G11C29/04 ,  G11C11/401 ,  G11C29/12 ,  G11C11/408 ,  G11C29/02

Abstract: A controller includes an internal memory to store an address and a memory control unit operatively coupled with the internal memory. The memory control unit includes logic to identify a malfunctioning address of primary data storage elements within an external memory device, the external memory device being another semiconductor device separate from the controller, store the malfunctioning address in the internal memory, and transmit, to the external memory device, a command to initiate a repair of the malfunctioning address using redundant data storage elements and an indication of an address associated with the malfunctioning address.

公开(公告)号：US10302696B2

公开(公告)日：2019-05-28

申请号：US15395546

申请日：2016-12-30

Applicant: Rambus Inc.

Inventor： Adrian E. Ong ,  Paul Fuller ,  Nick van Heel ,  Mark Thomann

IPC: G01R31/26 ,  G01R31/317 ,  G01R31/28

Abstract: Methods, systems, and apparatus for testing semiconductor devices.

公开(公告)号：US10114073B2

公开(公告)日：2018-10-30

申请号：US14827983

申请日：2015-08-17

Applicant: RAMBUS INC.

Inventor： Adrian E. Ong

IPC: G01R31/28 ,  G01R31/317 ,  G01R31/3193

Abstract: Systems and methods of testing integrated circuits are disclosed. A system may include a data compression component to compress data received from an integrated circuit under test at a first clock frequency, to generate compressed data. The system may also include a data output component, operatively coupled to the data compression component, to convey the compressed data to automated testing equipment at a second clock frequency.

公开(公告)号：US20180254241A1

公开(公告)日：2018-09-06

申请号：US15893491

申请日：2018-02-09

Applicant: Rambus Inc.

Inventor： Adrian E. Ong ,  Dong Sik Jeong

IPC: H01L23/50 ,  H01L23/538 ,  H01L21/48

CPC classification number: H01L23/50 ,  H01L21/485 ,  H01L23/5382 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods, systems, and apparatus for reducing power consumption or signal distortions in a semiconductor device package. The semiconductor device package includes a semiconductor device, a first electric path, a second electric path, and an isolation element in the first electric path. The second electric path is electrically connected to the first electric path and a functional unit of the device. The isolation element separates an isolated portion in the first electric path from the second electric path, where the isolation element is configured to reduce current in the isolated portion when a signal is passing through the second electric path.

公开(公告)号：US10008291B2

公开(公告)日：2018-06-26

申请号：US15599713

申请日：2017-05-19

Applicant: RAMBUS INC.

Inventor： Adrian E. Ong ,  Fan Ho

IPC: G11C29/04 ,  G11C29/00 ,  G11C11/401 ,  G11C29/12 ,  G11C29/02 ,  G11C11/408 ,  G11C29/48 ,  G11C29/44

CPC classification number: G11C29/76 ,  G11C11/401 ,  G11C11/4085 ,  G11C29/027 ,  G11C29/04 ,  G11C29/12 ,  G11C29/4401 ,  G11C29/48 ,  G11C29/78 ,  G11C29/789 ,  G11C29/802 ,  G11C2229/743

Abstract: A controller includes an internal memory to store an address and a memory control unit operatively coupled with the internal memory. The memory control unit includes logic to identify a malfunctioning address of primary data storage elements within an external memory device, the external memory device being another semiconductor device separate from the controller, store the malfunctioning address in the internal memory, and transmit, to the external memory device, a command to initiate a repair of the malfunctioning address using redundant data storage elements and an indication of an address associated with the malfunctioning address.

公开(公告)号：US20240071559A1

公开(公告)日：2024-02-29

申请号：US18243054

申请日：2023-09-06

Applicant: Rambus Inc.

Inventor： Adrian E. Ong ,  Fan Ho

IPC: G11C29/00 ,  G11C11/401 ,  G11C11/408 ,  G11C29/02 ,  G11C29/04 ,  G11C29/12 ,  G11C29/44 ,  G11C29/48

CPC classification number: G11C29/76 ,  G11C11/401 ,  G11C11/4085 ,  G11C29/027 ,  G11C29/04 ,  G11C29/12 ,  G11C29/4401 ,  G11C29/48 ,  G11C29/78 ,  G11C29/802 ,  G11C29/789 ,  G11C2229/743

Abstract: A dynamic random access memory (DRAM) comprises a plurality of primary data storage elements, a plurality of redundant data storage elements, and circuitry to receive a first register setting command and initiate a repair mode in the DRAM in response to the first register setting command. The circuitry is further to receive an activation command, repair a malfunctioning row address in the DRAM, receive a precharge command, receive a second register setting command, terminate the repair mode in the DRAM in response to the second register setting command, receive a memory access request for data stored at the malfunctioning row address, and redirect the memory access request to a corresponding row address in the plurality of redundant data storage elements.

公开(公告)号：US11009548B2

公开(公告)日：2021-05-18

申请号：US16421984

申请日：2019-05-24

Applicant: Rambus Inc.

Inventor： Adrian E. Ong ,  Paul Fuller ,  Nick van Heel ,  Mark Thomann

IPC: G01R31/26 ,  G01R31/3187 ,  G01R31/317 ,  G01R31/28

Abstract: Methods, systems, and apparatus for testing semiconductor devices.

公开(公告)号：US20190353707A1

公开(公告)日：2019-11-21

申请号：US16421984

申请日：2019-05-24

Applicant: Rambus Inc.

Inventor： Adrian E. Ong ,  Paul Fuller ,  Nick van Heel ,  Mark Thomann

IPC: G01R31/317 ,  G01R31/28

Abstract: Methods, systems, and apparatus for testing semiconductor devices.