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公开(公告)号:US20150049798A1
公开(公告)日:2015-02-19
申请号:US14363054
申请日:2012-11-30
Applicant: RAMBUS INC.
Inventor: Masum Hossein , Farshid Aryanfar , Jihong Ren , Jared L. Zerbe
CPC classification number: G06F1/3203 , H04B1/12 , H04L7/0054 , H04L7/033 , H04L25/03006 , H04L25/03012 , H04L25/03057 , H04L25/03127 , H04L25/03146 , H04L25/03853 , H04L2025/03433
Abstract: A receiver integrated circuit is disclosed that includes a filter and a linear equalization circuit. The filter has an input to receive a signal symbols a main tap and a pre-cursor tap to reduces a pre-cursor ISI acting on the data symbols. The linear equalization circuit couples to the output and cooperates with the filter to further reduce ISI.
Abstract translation: 公开了一种接收机集成电路,其包括滤波器和线性均衡电路。 滤波器具有用于接收主要抽头和前置光标抽头的信号符号的输入,以减少作用在数据符号上的前标ISI。 线性均衡电路耦合到输出并与滤波器配合以进一步减少ISI。