公开(公告)号：US20180205579A1

公开(公告)日：2018-07-19

申请号：US15743621

申请日：2015-11-12

申请人： LG ELECTRONICS INC.

发明人： Sangrim LEE ,  Dongkyu KIM ,  Hyunsoo KO ,  Kwangseok NOH ,  Hojae LEE

IPC分类号： H04L25/03 ,  H04L5/14 ,  H04L25/02

CPC分类号： H04L25/03 ,  H04B1/525 ,  H04J11/0036 ,  H04J11/0063 ,  H04L5/0032 ,  H04L5/14 ,  H04L5/1461 ,  H04L25/0202 ,  H04L25/03146

摘要： A method for estimating a nonlinear self-interference channel in a wireless channel system, according to the present invention, can further comprise the steps of: applying a first sequence to a first symbol; applying, to a second symbol, a sequence of which a phase is shifted from that of the first sequence by π/2; and transmitting the first symbol and the second symbol.

公开(公告)号：US20180196489A1

公开(公告)日：2018-07-12

申请号：US15863712

申请日：2018-01-05

申请人： Rambus Inc.

发明人： Yu Chang ,  Lei Luo ,  Kyung Suk Oh

IPC分类号： G06F1/32 ,  H04L25/03 ,  H04B1/12 ,  H04L7/00 ,  H04L7/033

CPC分类号： G06F1/3203 ,  H04B1/12 ,  H04L7/0054 ,  H04L7/033 ,  H04L25/03006 ,  H04L25/03012 ,  H04L25/03057 ,  H04L25/03127 ,  H04L25/03146 ,  H04L25/03853 ,  H04L2025/03433

摘要： Disclosed embodiments relate to a system that changes transmitter and/or receiver settings to deal with reliability issues caused by a predetermined event, such as a change in a power state or a clock start event. One embodiment uses a first setting while operating a transmitter during a normal operating mode, and a second setting while operating the transmitter during a transient period following the predetermined event. A second embodiment uses similar first and second settings in a receiver, or in both a transmitter and a receiver employed on one side of a bidirectional link. The first and second settings can be associated with different swing voltages, edge rates, equalizations and/or impedances.

公开(公告)号：US20180152326A1

公开(公告)日：2018-05-31

申请号：US15878334

申请日：2018-01-23

申请人： Marvell World Trade Ltd.

发明人： Shaoan Dai ,  Zhenzhong Gu ,  Kok-Wui Cheong

IPC分类号： H04L25/03 ,  H04B3/23 ,  H04B17/309 ,  H04B3/493

CPC分类号： H04L25/03057 ,  H04B3/23 ,  H04B3/235 ,  H04B3/237 ,  H04B3/493 ,  H04B17/309 ,  H04L25/03146 ,  H04L25/03885 ,  H04L2025/03802

摘要： Systems and techniques relating to channel degradation detection for communication systems are described. A described system includes a processor and an interface to transmit signals and receive signals via a channel that includes a cable. The processor can be configured to perform echo cancellation based on echo tap values to remove portions of the transmitted signals that appear as echoes within the received signals, signal equalization based on equalizer tap values, or both. The processor can be configured to determine a channel quality indicator of the channel based on one or more of the echo tap values, one or more of the equalizer tap values, or both. The processor can be configured to generate a warning indication based on the channel quality indicator indicating a degradation of the cable or the channel.

公开(公告)号：US20180048496A1

公开(公告)日：2018-02-15

申请号：US15550204

申请日：2015-04-02

申请人： Telefonaktiebolaget LM Ericsson (publ)

发明人： Emil Ringh ,  Ather Gattami

IPC分类号： H04L25/03 ,  H04L25/497

CPC分类号： H04L25/03834 ,  H04B7/0456 ,  H04L25/03006 ,  H04L25/03146 ,  H04L25/497

摘要： There is provided mechanisms for processing a reception signal r. The method is performed by a receiver. The method comprises receiving a reception signal r representing a sequence of input symbols xn, the reception signal comprising a sequence of pulse forms gT selected from a set of pulse forms. The method comprises generating a set of decoded symbols Formula (I) from the reception symbols by subjecting a set of sampled symbols yn derived from the reception signal to a whitening filter defined by second coefficients K, and to an equalizer defmed by first coefficients R. The first coefficients R and the second coefficients K are selected from respective matrices of a Toeplitz decomposition of a Gram matrix G defmed by the inner product of all pulses in the set of pulse forms. {circumflex over (x)}n  (I)

公开(公告)号：US09787506B2

公开(公告)日：2017-10-10

申请号：US14986177

申请日：2015-12-31

申请人： SK hynix Inc.

发明人： Kwan Su Shon ,  Yo Han Jeong

IPC分类号： H03K5/159 ,  H04L25/03

CPC分类号： H04L25/03267 ,  H04L25/03146 ,  H04L25/063

摘要： An equalization circuit may include a buffer configured to sense an input signal according to a reference voltage. The equalization circuit may include a reference voltage generator configured to generate the reference voltage. The reference voltage may be changed in conformity with noise of the input signal.

公开(公告)号：US09674013B2

公开(公告)日：2017-06-06

申请号：US15087494

申请日：2016-03-31

申请人： DELL PRODUCTS, LP

发明人： Bhavesh G. Patel ,  Bhyrav M. Mutnury

IPC分类号： H03H7/40 ,  H04L25/03

CPC分类号： H04L25/03878 ,  H04L25/03146

摘要： A receiver includes an analog-to-digital converter module configured to receive a test bit stream via a transmission channel and to provide a channel loss value of the transmission channel based on the test bit stream, a continuous time linear equalization module configured to receive a data bit stream via the transmission channel and to provide an equalized data bit stream based on an equalization setting, and a control module configured to set the equalization setting such that the CTLE module provides an equalization level to compensate for the channel loss value.

公开(公告)号：US20170149513A1

公开(公告)日：2017-05-25

申请号：US15368805

申请日：2016-12-05

申请人： Rambus Inc.

发明人： Andrew Ho ,  Vladimir Stojanovic ,  Bruno W. Garlepp ,  Fred F. Chen

IPC分类号： H04B17/29 ,  H04L25/03

CPC分类号： H04B17/29 ,  G01R31/31711 ,  G06F11/08 ,  H04B17/21 ,  H04L1/20 ,  H04L1/241 ,  H04L1/242 ,  H04L7/033 ,  H04L7/043 ,  H04L7/10 ,  H04L25/03006 ,  H04L25/03057 ,  H04L25/03146 ,  H04L25/03949 ,  H04L27/01

摘要： Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data, and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns, and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

公开(公告)号：US20170093601A1

公开(公告)日：2017-03-30

申请号：US14870340

申请日：2015-09-30

申请人： HUAWEI TECHNOLOGIES CO., LTD.

发明人： Huong HO

IPC分类号： H04L25/03

CPC分类号： H04L25/03057 ,  H04L25/03146

摘要： Circuits, devices, methods for decision feedback equalization are described. A decision feedback circuit can include L N-tap decision feedback equalizer (DFE) branches. The L N-tap DFE branches can include K unrolled DFE branches, and L−K unfolded DFE branches. Each DFE branch can include a pre-computation stage configured to generate a set of tap-adjusted inputs, each tap-adjusted input corresponding to a possible value for at least one previous output of the same DFE branch. Each unrolled DFE branch can include a multiplexer circuit having selection lines for selecting from the set of tap-adjusted inputs for the unrolled DFE branch, the selection lines being connected to outputs of other DFE branches. Each unfolded DFE branch can include a multiplexer circuit configured to select at least one output from the set of tap-adjusted inputs based on tap-adjusted inputs from other DFE branches.

公开(公告)号：US20170085399A1

公开(公告)日：2017-03-23

申请号：US14863300

申请日：2015-09-23

申请人： INTEL CORPORATION

发明人： Salman Latif ,  Ravindran Mohanavelu ,  Sitaraman V. Iyer

IPC分类号： H04L25/03 ,  H03M1/72 ,  H03M1/06 ,  H04L27/01

CPC分类号： H04L25/03146 ,  H03M1/72 ,  H04L25/03006

摘要： Embodiments include a pulsed decision feedback equalization (DFE) circuit. The DFE circuit may include a current integrating summer (CIS) circuit that passes one or more data signals on respective data nodes based on an input data signal and a clock signal. The DFE circuit may further include a correction circuit, such as a current digital-to-analog converter (IDAC) circuit, that may provide a correction circuit to a data node based on a prior bit of the input data signal. The correction circuit may provide a conductive path between a current source of the correction circuit and the data node for a time period that is less than the unit interval (UI) of the clock signal and/or data signal. The DFE circuit may include a plurality of correction circuits to provide respective correction signals based on different prior bits of the input data signal. Other embodiments may be described and claimed.

公开(公告)号：US20170077973A1

公开(公告)日：2017-03-16

申请号：US15227023

申请日：2016-08-03

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Tae-ho KIM

IPC分类号： H04B1/12 ,  H04L25/03 ,  H04L27/01

CPC分类号： H04B1/123 ,  H04L25/03146 ,  H04L27/2605 ,  H04L27/2643 ,  H04L27/265

摘要： A receiving apparatus is provided. The receiving apparatus may include a receiver, a PN sequence remover, and a zero padding performing unit. The receiver may be configured to receive a frame signal. The PN sequence remover may be configured to remove a first PN sequence from a first frame detected from the frame signal corresponding to a first path to generate a PN removed first frame and remove a second PN sequence from a second frame detected from the frame signal corresponding to a second path to generate a PN removed second frame. The zero padding performing unit may be configured zero pad the first PN removed frame to a size of a discrete Fourier transform (DFT) and zero pad the PN removed second frame to the size of the DFT.

摘要翻译： 提供接收装置。 接收装置可以包括接收机，PN序列去除器和零填充执行单元。 接收机可以被配置为接收帧信号。 PN序列去除器可以被配置为从对应于第一路径的帧信号检测到的第一帧中去除第一PN序列，以产生PN移除的第一帧，并从对应于帧信号检测到的第二帧中移除第二PN序列 到第二路径以产生PN移除的第二帧。 零填充执行单元可以被配置为将第一PN移除的帧零填充到离散傅里叶变换（DFT）的大小，并且将PN移除的第二帧零填充到DFT的大小。