公开(公告)号：US20160005455A1

公开(公告)日：2016-01-07

申请号：US14833028

申请日：2015-08-21

Applicant: Rambus Inc.

Inventor： Thomas Vogelsang ,  Brent Haukness ,  Stephen Charles Bowyer

IPC: G11C11/4096 ,  G11C11/4091 ,  G11C11/408

CPC classification number: G11C11/4096 ,  G06F12/00 ,  G06F13/1694 ,  G11C11/4087 ,  G11C11/4091 ,  Y02D10/14

Abstract: Embodiments generally relate to a command protocol and/or related circuits and apparatus for communication between a memory device and a memory controller. In one embodiment, the memory controller includes an interface for transmitting commands to the memory device, wherein the memory device includes bitline multiplexers, and accessing of memory cells within the memory device is carried out by a command protocol sequence that includes a wordline selection, followed by bitline selections by the bitline multiplexers. In another embodiment, a memory device includes bitline multiplexers and further includes an interface for receiving a command protocol sequence that specifies a wordline selection followed by bitline selections by the bitline multiplexers.

公开(公告)号：US20130132685A1

公开(公告)日：2013-05-23

申请号：US13653033

申请日：2012-10-16

Applicant: RAMBUS INC.

Inventor： Thomas Vogelsang ,  Brent Haukness ,  Stephen Charles Bowyer

IPC: G06F12/00

CPC classification number: G11C11/4096 ,  G06F12/00 ,  G06F13/1694 ,  G11C11/4087 ,  G11C11/4091

Abstract: Embodiments generally relate to a command protocol and/or related circuits and apparatus for communication between a memory device and a memory controller. In one embodiment, the memory controller includes an interface for transmitting commands to the memory device, wherein the memory device includes bitline multiplexers, and accessing of memory cells within the memory device is carried out by a command protocol sequence that includes a wordline selection, followed by bitline selections by the bitline multiplexers. In another embodiment, a memory device includes bitline multiplexers and further includes an interface for receiving a command protocol sequence that specifies a wordline selection followed by bitline selections by the bitline multiplexers.

Abstract translation: 实施例通常涉及用于存储器设备和存储器控制器之间的通信的命令协议和/或相关电路和装置。 在一个实施例中，存储器控制器包括用于向存储器件发送命令的接口，其中存储器件包括位线复用器，并且通过包括字线选择的命令协议序列执行存储器设备内的存储器单元的访问， 通过位线多路复用器的位线选择。 在另一个实施例中，存储器件包括位线多路复用器，并且还包括接口，用于接收指定字线选择的命令协议序列，随后由位线复用器进行位线选择。

公开(公告)号：US10269411B2

公开(公告)日：2019-04-23

申请号：US14833028

申请日：2015-08-21

Applicant: Rambus Inc.

Inventor： Thomas Vogelsang ,  Brent Haukness ,  Stephen Charles Bowyer

IPC: G11C11/00 ,  G11C11/4096 ,  G06F12/00 ,  G06F13/16 ,  G11C11/408 ,  G11C11/4091

Abstract: Embodiments generally relate to a command protocol and/or related circuits and apparatus for communication between a memory device and a memory controller. In one embodiment, the memory controller includes an interface for transmitting commands to the memory device, wherein the memory device includes bitline multiplexers, and accessing of memory cells within the memory device is carried out by a command protocol sequence that includes a wordline selection, followed by bitline selections by the bitline multiplexers. In another embodiment, a memory device includes bitline multiplexers and further includes an interface for receiving a command protocol sequence that specifies a wordline selection followed by bitline selections by the bitline multiplexers.

公开(公告)号：US09116781B2

公开(公告)日：2015-08-25

申请号：US13653033

申请日：2012-10-16

Applicant: Rambus Inc.

Inventor： Thomas Vogelsang ,  Brent Haukness ,  Stephen Charles Bowyer

IPC: G06F12/00 ,  G06F13/16

CPC classification number: G11C11/4096 ,  G06F12/00 ,  G06F13/1694 ,  G11C11/4087 ,  G11C11/4091

Abstract: Embodiments generally relate to a command protocol and/or related circuits and apparatus for communication between a memory device and a memory controller. In one embodiment, the memory controller includes an interface for transmitting commands to the memory device, wherein the memory device includes bitline multiplexers, and accessing of memory cells within the memory device is carried out by a command protocol sequence that includes a wordline selection, followed by bitline selections by the bitline multiplexers. In another embodiment, a memory device includes bitline multiplexers and further includes an interface for receiving a command protocol sequence that specifies a wordline selection followed by bitline selections by the bitline multiplexers.

Abstract translation: 实施例通常涉及用于存储器设备和存储器控制器之间的通信的命令协议和/或相关电路和装置。 在一个实施例中，存储器控制器包括用于向存储器件发送命令的接口，其中存储器件包括位线复用器，并且通过包括字线选择的命令协议序列执行存储器设备内的存储器单元的访问， 通过位线多路复用器的位线选择。 在另一个实施例中，存储器件包括位线多路复用器，并且还包括接口，用于接收指定字线选择的命令协议序列，随后由位线复用器进行位线选择。