公开(公告)号：US20210210337A1

公开(公告)日：2021-07-08

申请号：US17202884

申请日：2021-03-16

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazuhiko SEGI

IPC: H01L21/02 ,  H01L29/51 ,  H01L21/266 ,  H01L21/265 ,  H01L21/28

Abstract: First, an offset spacer including a stacked film of insulating films is formed on the upper surface of the semiconductor layer, the side surface of the gate electrode, and the side surface of the cap film. Next, a part of the insulating films is removed to expose the upper surface of the semiconductor layer. Next, in a state where the side surface of the gate electrode is covered with the insulating films, an epitaxial layer is formed on the exposed upper surface of the semiconductor layer. Here, among the offset spacers, the insulating film which is a silicon nitride film is formed at a position closest to the gate electrode, and the position of the upper end of the insulating film formed on the side surface of the gate electrode is higher than the position of the upper surface of the gate electrode.

公开(公告)号：US20230413568A1

公开(公告)日：2023-12-21

申请号：US18303909

申请日：2023-04-20

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazuhiko SEGI ,  Yoshiyuki KAWASHIMA

IPC: H10B43/35 ,  H10B43/40

CPC classification number: H10B43/35 ,  H10B43/40

Abstract: In a memory region, a memory-region first portion in which no raised epitaxial layer is formed, a memory-region second portion in which a first raised epitaxial layer is formed, and a memory-region third portion in which a second raised epitaxial layer is formed are defined. In the memory-region first portion, a first-diffusion-layer first portion of a memory transistor and a second-diffusion-layer first portion of a select transistor are formed. A first-diffusion-layer second portion of the memory transistor is formed in the first raised epitaxial layer. A second-diffusion-layer second portion of the select transistor is formed in the second raised epitaxial layer.