公开(公告)号：US20240105844A1

公开(公告)日：2024-03-28

申请号：US18462803

申请日：2023-09-07

Applicant: Richtek Technology Corporation

Inventor： Ying-Shiou Lin ,  Wu-Te Weng ,  Yong-Zhong Hu

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/7833 ,  H01L29/66492

Abstract: A native NMOS device includes: a P-type epitaxial layer, a first and a second insulation region, a first P-type well, a second P-type well, a gate, an N-type source, and an N-type drain. The P-type epitaxial layer has a first concentration of P-type doped impurities. The first P-type well completely encompasses and is in contact with a lower surface of the N-type source. The second P-type well completely encompasses and is in contact with a lower surface of the N-type drain. Each of the first P-type well and the second P-type well has a second concentration of P-type doped impurities, and the second concentration of P-type doped impurities is higher than the first concentration of P-type doped impurities. The second concentration of P-type doped impurities is sufficient for preventing a leakage current from flowing between the N-type drain and the P-type substrate while the native NMOS device is in operation.

公开(公告)号：US10355088B2

公开(公告)日：2019-07-16

申请号：US15622227

申请日：2017-06-14

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Tsung-Yi Huang ,  Ying-Shiou Lin

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L21/74 ,  H01L29/08 ,  H01L29/66

Abstract: The present invention provides a MOS (Metal-Oxide-Silicon) device having mitigated threshold voltage roll-off and a threshold voltage roll-off mitigation method therefor. The MOS device includes: a substrate, a well region, an isolation region, a gate, two LDDs (Lightly-Doped-Drains), a source, a drain and a compensation doped region. The compensation doped region is substantially in contact with at least a part of a recessed portion along the channel length direction. Viewing from a cross-section view, at a boundary where the compensation doped region is in contact with the isolation region along the channel length direction, the compensation doped region has two doped region widths along the channel width direction, wherein, the two doped region widths of the compensation doped region are both not greater than 10% of the width of the operation region. Two doped region widths are defined as distances within an interior part and an exterior part of the operation region, respectively.

公开(公告)号：US20220165880A1

公开(公告)日：2022-05-26

申请号：US17666501

申请日：2022-02-07

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Tsung-Yi Huang ,  Kun-Huang Yu ,  Ying-Shiou Lin ,  Chu-Feng Chen ,  Chung-Yu Hung ,  Yi-Rong Tu

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/10 ,  H01L29/08

Abstract: A high voltage device includes: a semiconductor layer, a well, a body region, a gate, a source, a drain, and a drift oxide region. The semiconductor layer is formed on a substrate, wherein the semiconductor layer has at least one trench. The well is formed in the semicoducotor layer. The body region is formed in the well. The gate is formed on the well, and is in contact with the well. The source and the drain are located below, outside, and at different sides of the gate, in the body region and the well respectively. The drift oxide region is formed on a drift region, wherein a bottom surface of the drift oxide region is higher than a bottom surface of the trench.

公开(公告)号：US20180190773A1

公开(公告)日：2018-07-05

申请号：US15622227

申请日：2017-06-14

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Tsung-Yi Huang ,  Ying-Shiou Lin

IPC: H01L29/10 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L21/74 ,  H01L29/66

CPC classification number: H01L29/1083 ,  H01L21/74 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/6659 ,  H01L29/7833

Abstract: The present invention provides a MOS (Metal-Oxide-Silicon) device having mitigated threshold voltage roll-off and a threshold voltage roll-off mitigation method therefor. The MOS device includes: a substrate, a well region, an isolation region, a gate, two LDDs (Lightly-Doped-Drains), a source, a drain and a compensation doped region. The compensation doped region is substantially in contact with at least a part of a recessed portion along the channel length direction. Viewing from a cross-section view, at a boundary where the compensation doped region is in contact with the isolation region along the channel length direction, the compensation doped region has two doped region widths along the channel width direction, wherein, the two doped region widths of the compensation doped region are both not greater than 10% of the width of the operation region. Two doped region widths are defined as distances within an interior part and an exterior part of the operation region, respectively.