公开(公告)号：US20210043730A1

公开(公告)日：2021-02-11

申请号：US16789498

申请日：2020-02-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： SANGGIL LEE ,  NAMKYU CHO ,  SEOKHOON KIM ,  KANG HUN MOON ,  HYUN-KWAN YU ,  SIHYUNG LEE

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

Abstract: Disclosed is a semiconductor device including a first active pattern that extends in a first direction on an active region of a substrate, a first source/drain pattern in a recess on an upper portion of the first active pattern, a gate electrode that runs across a first channel pattern on the upper portion of the first active pattern and extends in a second direction intersecting the first direction, and an active contact electrically connected to the first source/drain pattern.

公开(公告)号：US20230411451A1

公开(公告)日：2023-12-21

申请号：US18182435

申请日：2023-03-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEUNG MO KANG ,  TAEGON KIM ,  JAEMUN KIM ,  JAEHOON OH ,  SUNHYE LEE ,  SIHYUNG LEE ,  JURI LEE

IPC: H01L29/06 ,  H01L21/762 ,  H01L21/02 ,  H01L21/768 ,  H01L29/423

CPC classification number: H01L29/0653 ,  H01L21/76224 ,  H01L21/02164 ,  H01L21/76829 ,  H01L29/42392

Abstract: A semiconductor device may include a first active pattern and a second active pattern on a substrate, a device isolation layer in a trench between the first active pattern and the second active pattern, a first channel pattern and a second channel pattern provided on the first active pattern and the second active pattern, respectively, each of the first channel pattern and the second channel pattern including a plurality of stacked semiconductor patterns, and a gate electrode on the first channel pattern and the second channel pattern. The device isolation layer may include a first portion and a second portion which are vertically overlapped with the gate electrode. The first portion may be provided on the second portion. A silicon concentration of the first portion may be higher than a silicon concentration of the second portion.

公开(公告)号：US20200084881A1

公开(公告)日：2020-03-12

申请号：US16422969

申请日：2019-05-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： SIHYUNG LEE ,  CHANGWOO KO ,  SEON-SIK KIM ,  JIYOON MOON ,  JINOH AHN

IPC: H05K1/02 ,  H05K1/18 ,  H05K1/11

Abstract: A semiconductor memory module may include a printed circuit board and semiconductor memory packages provided on the printed circuit board. The printed circuit board may include a connector provided at a side region of the printed circuit board and configured to be connected to an external device, signal lines configured to connect the connector to the semiconductor memory packages, a first element configured to provide a first capacitive coupling between first signal lines, which are closest to each other, among the signal lines, a second element configured to provide a second capacitive coupling between second signal lines, which are disposed adjacent to each other with one signal line interposed therebetween, among the signal lines, and a third element configured to provide a third capacitive coupling between third signal lines, which are disposed adjacent to each other with two signal lines interposed therebetween, among the signal lines.

公开(公告)号：US20210336007A1

公开(公告)日：2021-10-28

申请号：US17371858

申请日：2021-07-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： SANGGIL LEE ,  NAMKYU CHO ,  SEOKHOON KIM ,  KANG HUN MOON ,  HYUN-KWAN YU ,  SIHYUNG LEE

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/78 ,  H01L29/66 ,  H01L21/762

Abstract: Disclosed is a semiconductor device including a first active pattern that extends in a first direction on an active region of a substrate, a first source/drain pattern in a recess on an upper portion of the first active pattern, a gate electrode that runs across a first channel pattern on the upper portion of the first active pattern and extends in a second direction intersecting the first direction, and an active contact electrically connected to the first source/drain pattern.