公开(公告)号：US11968824B2

公开(公告)日：2024-04-23

申请号：US18137169

申请日：2023-04-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngjun Kim ,  Seokhyun Kim ,  Jinhyung Park ,  Hoju Song ,  Hyeran Lee ,  Sungwoo Kim ,  Bongsoo Kim

IPC: H01L27/10 ,  H01L21/768 ,  H10B12/00

CPC classification number: H10B12/485 ,  H01L21/76829 ,  H10B12/0335 ,  H10B12/09 ,  H10B12/315

Abstract: A semiconductor device includes a bit line structure, first and second capping patterns, first and second contact plug structures, and a capacitor. The bit line structure extends on a cell region and a dummy region. The first capping pattern is adjacent the bit line structure on the cell region. The second capping pattern is adjacent the bit line structure on the dummy region. The first contact plug structure is adjacent the bit line structure and the first capping pattern on the cell region, and includes a lower contact plug and a first upper contact plug sequentially stacked. The second contact plug structure is adjacent the bit line structure and the second capping pattern on the dummy region, and includes a dummy lower contact plug and a second upper contact plug sequentially stacked. The capacitor contacts an upper surface of the first contact plug structure on the cell region.

公开(公告)号：US20230255021A1

公开(公告)日：2023-08-10

申请号：US18137169

申请日：2023-04-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngjun Kim ,  Seokhyun Kim ,  Jinhyung Park ,  Hoju Song ,  Hyeran Lee ,  Bongsoo Kim ,  Sungwoo Kim

IPC: H10B12/00 ,  H01L21/768

CPC classification number: H10B12/485 ,  H01L21/76829 ,  H10B12/09 ,  H10B12/315 ,  H10B12/0335

Abstract: A semiconductor device includes a bit line structure, first and second capping patterns, first and second contact plug structures, and a capacitor. The bit line structure extends on a cell region and a dummy region. The first capping pattern is adjacent the bit line structure on the cell region. The second capping pattern is adjacent the bit line structure on the dummy region. The first contact plug structure is adjacent the bit line structure and the first capping pattern on the cell region, and includes a lower contact plug and a first upper contact plug sequentially stacked. The second contact plug structure is adjacent the bit line structure and the second capping pattern on the dummy region, and includes a dummy lower contact plug and a second upper contact plug sequentially stacked. The capacitor contacts an upper surface of the first contact plug structure on the cell region.

公开(公告)号：US11678478B2

公开(公告)日：2023-06-13

申请号：US17667697

申请日：2022-02-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngjun Kim ,  Seokhyun Kim ,  Jinhyung Park ,  Hoju Song ,  Hyeran Lee ,  Bongsoo Kim ,  Sungwoo Kim

IPC: H01L27/10 ,  H01L27/108 ,  H01L21/768

CPC classification number: H01L27/10888 ,  H01L21/76829 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10894

Abstract: A semiconductor device includes a bit line structure, first and second capping patterns, first and second contact plug structures, and a capacitor. The bit line structure extends on a cell region and a dummy region. The first capping pattern is adjacent the bit line structure on the cell region. The second capping pattern is adjacent the bit line structure on the dummy region. The first contact plug structure is adjacent the bit line structure and the first capping pattern on the cell region, and includes a lower contact plug and a first upper contact plug sequentially stacked. The second contact plug structure is adjacent the bit line structure and the second capping pattern on the dummy region, and includes a dummy lower contact plug and a second upper contact plug sequentially stacked. The capacitor contacts an upper surface of the first contact plug structure on the cell region.

公开(公告)号：US11264392B2

公开(公告)日：2022-03-01

申请号：US16832268

申请日：2020-03-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngjun Kim ,  Seokhyun Kim ,  Jinhyung Park ,  Hoju Song ,  Hyeran Lee ,  Bongsoo Kim ,  Sungwoo Kim

IPC: H01L29/00 ,  H01L27/108

Abstract: A semiconductor device includes a bit line structure, first and second capping patterns, first and second contact plug structures, and a capacitor. The bit line structure extends on a cell region and a dummy region. The first capping pattern is adjacent the bit line structure on the cell region. The second capping pattern is adjacent the bit line structure on the dummy region. The first contact plug structure is adjacent the bit line structure and the first capping pattern on the cell region, and includes a lower contact plug and a first upper contact plug sequentially stacked. The second contact plug structure is adjacent the bit line structure and the second capping pattern on the dummy region, and includes a dummy lower contact plug and a second upper contact plug sequentially stacked. The capacitor contacts an upper surface of the first contact plug structure on the cell region.

公开(公告)号：US12178034B2

公开(公告)日：2024-12-24

申请号：US18501576

申请日：2023-11-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeonil Lee ,  Youngjun Kim ,  Jinbum Kim

IPC: H10B12/00

Abstract: A semiconductor device including an active pattern; a gate structure connected to the active pattern; a bit line structure connected to the active pattern; a buried contact connected to the active pattern; a contact pattern covering the buried contact; a landing pad connected to the contact pattern; and a capacitor structure connected to the landing pad, wherein the buried contact includes a first growth portion and a second growth portion spaced apart from each other, and the landing pad includes an interposition portion between the first growth portion and the second growth portion.

公开(公告)号：US20240373591A1

公开(公告)日：2024-11-07

申请号：US18648045

申请日：2024-04-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Daesung Moon ,  Jihyun Lee ,  Jaeryong Jung ,  Jaesun Cho ,  Yoonsang Jung ,  Youngjun Kim ,  Seonung Yeom ,  Yewon Lim ,  Sunil Hyun

IPC: H05K7/20 ,  H01J37/141 ,  H01J37/18 ,  H01J37/26

Abstract: A transmission electron microscope includes a specimen chamber, a heat exchange bridge extending outward from a side wall of the specimen chamber, and a heat exchange connector including a heat exchange tube provided around a first portion of the heat exchange bridge, and a housing sealing the first portion of the heat exchange bridge and the heat exchange tube from an outside of the heat exchange connector.

公开(公告)号：US20240155836A1

公开(公告)日：2024-05-09

申请号：US18492821

申请日：2023-10-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joonyoung Kang ,  Hoju Song ,  Kanguk Kim ,  Seokhyun Kim ,  Youngjun Kim ,  Jooncheol Kim ,  Jinwoong Kim ,  Hoin Ryu ,  Hyeran Lee

IPC: H10B12/00

CPC classification number: H10B12/485 ,  H10B12/02 ,  H10B12/315 ,  H10B12/34 ,  H10B12/482

Abstract: Semiconductor devices may include: a substrate including a plurality of active areas defined by a device isolation layer; a plurality of bit lines extending on the substrate in a first horizontal direction; a plurality of insulation fences that are spaced apart from each other in the first horizontal direction in a space between two adjacent bit lines among the plurality of bit lines on the substrate; a plurality of buried contacts that are between the adjacent two bit lines among the plurality of bit lines and are arranged alternately with the plurality of insulation fences along the first horizontal direction on the substrate, the plurality of buried contacts being connected to the plurality of active areas, respectively; and a plurality of insulating layer, each of which is between a respective one of the plurality of insulation fences and a respective one of the plurality of buried contacts.

公开(公告)号：US11531722B2

公开(公告)日：2022-12-20

申请号：US17284401

申请日：2019-07-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngjun Kim ,  Chanmuk Kim ,  Dohyoung Jung ,  Kwanghyun Koh

IPC: G06F16/955 ,  G06F16/9535 ,  G06F16/9538 ,  G06F40/284 ,  G06F11/34 ,  G06K9/62 ,  G06F16/28 ,  G06N20/00

Abstract: The present disclosure provides an electronic device and a control method therefor. An electronic device of the present disclosure may comprise a memory including at least one command, and a processor which is connected to the memory so as to control the electronic device, wherein the processor executes at least one instruction, so as to classify a uniform resource locator (URL) corresponding to at least one website accessed by a user during a preconfigured period into at least one segment, classify URLs according to a plurality of categories, on the basis of the at least one segment and a learned classification model, and determine, among the plurality of categories, a category of a website preferred by the user, on the basis of the user's website access history during the preconfigured period, an access history with respect to the at least one website, and a result of the classification. The electronic device of the present disclosure may use a rule-based model or an artificial intelligence model learned according to at least one of a machine learning, a neural network, or a deep learning algorithm.

公开(公告)号：US20250169108A1

公开(公告)日：2025-05-22

申请号：US18938703

申请日：2024-11-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taesun Kim ,  Sangjine Park ,  Youngjun Kim

IPC: H01L29/417 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: An integrated circuit device includes a fin-type active region extending in a first horizontal direction on a substrate, a gate line disposed on the fin-type active region on the substrate and extending in a second horizontal direction intersecting the first horizontal direction, a source/drain region disposed on the fin-type active region and disposed adjacent to the gate line in the first horizontal direction, a source/drain contact disposed on the source/drain region, an upper insulating structure disposed on the gate line and including an etch stop film and an interlayer insulating film, a source/drain via contact passing through the upper insulating structure and connected to the source/drain contact, and an air gap disposed between the etch stop film and the source/drain via contact and overlapping a part of the source/drain via contact in a horizontal direction.

公开(公告)号：US20230063527A1

公开(公告)日：2023-03-02

申请号：US17747238

申请日：2022-05-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaejin Lee ,  Youngjun Kim ,  Hunyoung Bark ,  Taekyung Yoon ,  Eunok Lee

IPC: H01L29/49 ,  H01L27/108

Abstract: A gate structure includes a first gate electrode including a metal, a gate barrier pattern on the first gate electrode and including a metal nitride, and a second gate electrode on the gate barrier pattern. The gate structure is buried in an upper portion of a substrate. The gate barrier pattern has a flat upper surface and an uneven lower surface.