NON-COHERENT DSSS DEMODULATOR WITH FAST SIGNAL ARRIVAL DETECTION AND IMPROVED TIMING AND FREQUENCY OFFSET ESTIMATION

    公开(公告)号:US20250007769A1

    公开(公告)日:2025-01-02

    申请号:US18217015

    申请日:2023-06-30

    Abstract: A receiver includes a demodulator having a configurable correlator bank that helps with fast and robust signal detection. The demodulator detects arrival of a first preamble symbol using a first correlator bank configuration. The demodulator makes a course frequency offset estimation after detection of the first preamble signal and the receiver adjusts a frequency used by a mixer based on the coarse frequency offset estimation. The demodulator confirms signal arrival detection with detection of a second preamble symbol. A coarse timing estimation is generated using a second correlator bank configuration using a multi-symbol observation period. A fine frequency offset estimation is made using a third correlation bank configuration. A fine timing estimation is made using a fourth correlation bank configuration. The demodulator then despreads received symbols using a fifth correlator bank configuration.

    Manchester Encoded On-Off Keying Transmissions for Wake-Up Protocol

    公开(公告)号:US20240292331A1

    公开(公告)日:2024-08-29

    申请号:US18175623

    申请日:2023-02-28

    CPC classification number: H04W52/0229 H04L27/02

    Abstract: In an embodiment, an apparatus includes a baseband processor comprising: a packet generation circuit to generate a wake-up packet comprising information to cause a first receiver to trigger a wake-up of a second receiver; an encoder to encode the wake-up packet with Manchester encoding to output Manchester encoded on-off keying (MOOK) data; and a modulator coupled to the encoder to receive random data and modulate the random data. This modulated random data may be amplitude modulated with the MOOK data to realize a radio frequency (RF) signal comprising the MOOK data that is to be transmitted to one or more receivers.

    NOISE DETECTION FOR MULTI-CHANNEL AND MULTI-PROTOCOL COMMUNICATIONS

    公开(公告)号:US20240188124A1

    公开(公告)日:2024-06-06

    申请号:US18073032

    申请日:2022-12-01

    Inventor: Qiang Li Yan Zhou

    CPC classification number: H04W74/0808 H04B17/309

    Abstract: Techniques for quickly and accurately determining whether a channel is being used for transmission of data using one of a plurality of communications protocols for low power signals using random data of a packet are disclosed. The techniques increase sensitivity and reduce the false alarm rate for a wide range of signal and noise levels. A noise detection technique uses an adaptive window size for fast noise detection that increases the rate of scanning channels during a signal identification period. In a BLE1M detection mode, detection of clusters of zero frequency deviation are used to reduce the false detection rate. Adaptive Zigbee symbol detection improves detection sensitivity beyond −97 dBm. The techniques use a chip-based differential to generate frequency deviation samples for Zigbee detection or data filtering frequency deviation samples generated using sample-based differentials based on an oversampled received signal to improve the signal-to-noise ratio.

    CONCURRENT LISTENING
    4.
    发明公开

    公开(公告)号:US20230371067A1

    公开(公告)日:2023-11-16

    申请号:US17743042

    申请日:2022-05-12

    CPC classification number: H04W74/0808 H04W74/04 H04L5/0053 H04W4/80 H04W4/23

    Abstract: A wireless communication device has a receiver to listen to a sequence of channels. A controller responds to a preamble being detected on a first channel while the receiver is tuned to the first channel by causing the receiver to stay on the first channel and decode packet(s) associated with the preamble. The controller responds to detection of a first symbol of a first transmission protocol and the preamble not being detected to cause the receiver to stay on the first channel for a predetermined time waiting for a retry. The controller responds to detection of a second symbol of a second transmission protocol and the preamble not being detected to cause the receiver to switch to an advertising channel of the second transmission protocol. If no preambles, noise, or symbols are detected, the receiver switches to listening to a next channel in the sequence after a fixed time.

    FAST FREQUENCY SYNTHESIZER SWITCHING
    5.
    发明公开

    公开(公告)号:US20230318609A1

    公开(公告)日:2023-10-05

    申请号:US17709642

    申请日:2022-03-31

    CPC classification number: H03L7/1075 H04B1/40 H03L7/099

    Abstract: A phase-locked loop (PLL) that provides a local oscillator signal for a radio. An oscillator of the PLL supplies an oscillator output signal. Control logic receives a request to change the oscillator output signal to a new frequency and responds to the request by setting a first capacitor circuit of the oscillator to a first capacitance that corresponds to a predetermined frequency of the oscillator output signal. The control logic also responds to the request by setting one or more other capacitor circuits of the oscillator according to temperature and according to a frequency difference between the predetermined frequency and the new frequency. After responding to the request by setting the first capacitor circuit and the one or more other capacitor circuits, the PLL locks to the new frequency using a signal from the PLL loop filter to adjust another capacitor circuit in the oscillator.

    Adjusting receiver frequency to compensate for frequency offset during a sounding sequence used for fractional time determination

    公开(公告)号:US11502883B2

    公开(公告)日:2022-11-15

    申请号:US17108912

    申请日:2020-12-01

    Abstract: A mixer in a receiver converts a sounding sequence of alternating ones and zeros to an intermediate frequency signal. A digital mixer converts the intermediate frequency signal to a baseband signal that contains a positive tone and a negative tone. A frequency offset correction circuit generates frequency offset corrections based on frequency offset estimates of the frequency offset between a transmitter of the sounding sequence and the receiver. A frequency adjustment circuit adjusts a frequency of the mixer or the digital mixer to thereby center the positive tone and the negative tone around DC. DFT circuits perform single bin DFTs respectively centered on the positive and negative tones. Phases of the positive and negative tones are calculated based on outputs of the DFT circuits and the phases are used to determine fractional time value associated with a distance measurement between the transmitter and receiver.

    PHASE MEASUREMENTS FOR HIGH ACCURACY DISTANCE MEASUREMENTS

    公开(公告)号:US20220174632A1

    公开(公告)日:2022-06-02

    申请号:US17107281

    申请日:2020-11-30

    Abstract: In at least one embodiment, a method for measuring a distance between a first communications device including a first local oscillator and a second communications device including a second local oscillator includes unwrapping N phase values to generate N unwrapped phase values. N is an integer greater than one. Each of the N phase values indicate an instantaneous phase of a received signal. The method includes averaging the N unwrapped phase values to generate an average phase value. The method includes wrapping the average phase value to generate a final phase measurement of the first local oscillator with respect to the second local oscillator.

    ADJUSTING DFT COEFFICIENTS TO COMPENSATE FOR FREQUENCY OFFSET DURING A SOUNDING SEQUENCE USED FOR FRACTIONAL TIME DETERMINATION

    公开(公告)号:US20220174453A1

    公开(公告)日:2022-06-02

    申请号:US17108908

    申请日:2020-12-01

    Abstract: A receiver includes a first discrete Fourier transform (DFT) block to perform a first single tone DFT on a positive tone associated with a sounding sequence. A second DFT block performs a second single tone DFT on a negative tone associated with the sounding sequence. A DFT coefficient generation block generates first DFT coefficients based on a nominal frequency of the positive tone and an estimated frequency offset between a transmitter frequency and a receiver frequency. The DFT coefficient generation block generates second DFT coefficients based on a nominal frequency of the negative tone and the estimated frequency offset. Multipliers in the DFT blocks multiply I and Q values of the sounding sequence with the coefficients. Accumulators in the DFT blocks accumulate multiplier outputs. An arctan function receives averaged accumulated values from the first and second DFT blocks and supplies first and second phase values used to calculate fractional timing.

    System, apparatus and method for performing antenna diversity selection based on multi-symbol correlations

    公开(公告)号:US10911129B1

    公开(公告)日:2021-02-02

    申请号:US16711824

    申请日:2019-12-12

    Abstract: In one embodiment, an apparatus includes: an antenna switch to receive a first radio frequency (RF) signal from a first antenna and a second RF signal from a second antenna and controllable to output a selected one of the first and second RF signals; an RF circuit to receive and process the first and second RF signals; at least one mixer to downconvert the first and second RF signals to first and second baseband signals; and an antenna diversity control circuit to receive sub-symbol portions of a first plurality of symbols of the first baseband signal and sub-symbol portions of a second plurality of symbols of the second baseband signal, and control the antenna switch to output one of the first and second RF signals, based at least in part on one or more of the sub-symbol portions of the first and second pluralities of symbols.

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