公开(公告)号：US20210187663A1

公开(公告)日：2021-06-24

申请号：US17121184

申请日：2020-12-14

Applicant: STMicroelectronics S.r.l.

Inventor： Antonio BELLIZZI ,  Michele DERAI

IPC: B23K26/38 ,  H01L21/304

Abstract: A semiconductor substrate such as a semiconductor wafer includes a cutting line having a length. The semiconductor substrate is cut along the line by first selectively applying laser beam ablation energy to the semiconductor substrate a certain locations along the cutting line and then blade sawing along cutting line. The semiconductor substrate thus includes one or more ablated regions as well as one or more unablated regions at the cutting line.

公开(公告)号：US20240413120A1

公开(公告)日：2024-12-12

申请号：US18808330

申请日：2024-08-19

Applicant: STMicroelectronics S.r.l.

Inventor： Giovanni GRAZIOSI ,  Michele DERAI

IPC: H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L23/495 ,  H01L23/64

Abstract: Disclosed herein is a method, including attaching a semiconductor chip to a chip mounting portion on at least one leadframe portion, and attaching a passive component on a passive component mounting portion of the at least one leadframe portion. The method further includes forming a laser direct structuring (LDS) activatable molding material over the semiconductor chip, passive component, and the at least one leadframe portion. Desired patterns of structured areas are formed within the LDS activatable molding material by activating the LDS activatable molding material. The desired patterns of structured areas are metallized to form conductive areas within the LDS activatable molding material to thereby form electrical connection between the semiconductor chip and the passive component. A passivation layer is formed on the LDS activatable molding material.

公开(公告)号：US20230402349A1

公开(公告)日：2023-12-14

申请号：US18335923

申请日：2023-06-15

Applicant: STMicroelectronics S.r.l.

Inventor： Michele DERAI ,  Dario VITELLO

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/49537 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/49579 ,  H01L23/49827

Abstract: A System in Package, SiP semiconductor device includes a substrate of laser direct structuring, LDS, material. First and second semiconductor die are arranged at a first and a second leadframe structure at opposite surfaces of the substrate of LDS material. Package LDS material is molded onto the second surface of the substrate of LDS material. The first semiconductor die and the package LDS material lie on opposite sides of the substrate of LDS material. A set of electrical contact formations are at a surface of the package molding material opposite the substrate of LDS material. The leadframe structures include laser beam processed LDS material. The substrate of LDS material and the package LDS material include laser beam processed LDS material forming at least one electrically-conductive via providing at least a portion of an electrically-conductive line between the first semiconductor die and an electrical contact formation at the surface of the package molding material opposite the substrate.

公开(公告)号：US20230386980A1

公开(公告)日：2023-11-30

申请号：US18324897

申请日：2023-05-26

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Michele DERAI ,  Guendalina CATALANO

IPC: H01L23/495 ,  H01L23/29 ,  H01L21/56 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/49513 ,  H01L23/29 ,  H01L21/563 ,  H01L24/03 ,  H01L24/05 ,  H01L23/49827 ,  H01L2224/05009 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05124 ,  H01L2224/05147

Abstract: A semiconductor die is attached on a die-attachment portion of a substrate such as a leadframe. The semiconductor die has a front surface opposite the substrate and one or more contact pads at the front surface having an outer surface finishing of a first electrically conductive material such as NiPd or Al. An encapsulation of laser direct structuring, LDS material is molded onto the semiconductor die attached on the substrate. Laser beam energy is applied to selected locations of the front surface of the encapsulation of LDS material to activate the LDS material at the selected locations and structure therein electrically conductive formations comprising one or more vias towards the contact pad. The vias comprise a second electrically conductive material that is different from the first electrically conductive material of the outer surface finishing of the contact pad. Prior to growing the second electrically conductive material a nickel layer is formed over the outer surface finishing of the contact pad, wherein the nickel layer promotes adhesion between the second electrically conductive material and the first electrically conductive material.

公开(公告)号：US20220199477A1

公开(公告)日：2022-06-23

申请号：US17549058

申请日：2021-12-13

Applicant: STMicroelectronics S.r.l.

Inventor： Michele DERAI ,  Dario VITELLO

IPC: H01L23/29 ,  H01L21/48 ,  H01L23/495 ,  H01L23/31

Abstract: A method of manufacturing semiconductor devices, such as QFN/BGA flip-chip type packages, arranging on a leadframe one or more semiconductor chips or dice having a first side facing towards the leadframe and electrically coupled therewith and a second side facing away from the leadframe. The method also includes molding an encapsulation on the semiconductor chip(s) arranged on the leadframe, where the encapsulation has an outer surface opposite the leadframe and comprises laser direct structuring (LDS) material. Laser direct structuring processing is applied to the LDS material of the encapsulation to provide metal vias between the outer surface of the encapsulation and the second side of the semiconductor chip(s) and as well as a metal pad at the outer surface of the encapsulation.

公开(公告)号：US20210305203A1

公开(公告)日：2021-09-30

申请号：US17344149

申请日：2021-06-10

Applicant: STMicroelectronics S.r.l.

Inventor： Giovanni GRAZIOSI ,  Michele DERAI

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/64 ,  H01L23/29 ,  H01L23/31

Abstract: Disclosed herein is a method, including attaching a semiconductor chip to a chip mounting portion on at least one leadframe portion, and attaching a passive component on a passive component mounting portion of the at least one leadframe portion. The method further includes forming a laser direct structuring (LDS) activatable molding material over the semiconductor chip, passive component, and the at least one leadframe portion. Desired patterns of structured areas are formed within the LDS activatable molding material by activating the LDS activatable molding material. The desired patterns of structured areas are metallized to form conductive areas within the LDS activatable molding material to thereby form electrical connection between the semiconductor chip and the passive component. A passivation layer is formed on the LDS activatable molding material.

公开(公告)号：US20230411258A1

公开(公告)日：2023-12-21

申请号：US18241414

申请日：2023-09-01

Applicant: STMicroelectronics S.r.l.

Inventor： Michele DERAI ,  Roberto TIZIANI

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/49805 ,  H01L21/4839 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49866

Abstract: A semiconductor device comprises at least one semiconductor die electrically coupled to a set of electrically conductive leads, and package molding material molded over the at least one semiconductor die and the electrically conductive leads. At least a portion of the electrically conductive leads is exposed at a rear surface of the package molding material to provide electrically conductive pads. The electrically conductive pads comprise enlarged end portions extending at least partially over the package molding material and configured for coupling to a printed circuit board.

公开(公告)号：US20230005803A1

公开(公告)日：2023-01-05

申请号：US17847824

申请日：2022-06-23

Applicant: STMicroelectronics S.r.l.

Inventor： Giovanni GRAZIOSI ,  Michele DERAI

IPC: H01L23/31 ,  H01L23/495 ,  H01L23/29

Abstract: A semiconductor chip is arranged on a first surface of a die pad in a substrate (leadframe) including an array of electrically conductive leads. An encapsulation of laser direct structuring (LDS) material encapsulates the substrate and the semiconductor chip. The encapsulation has a first surface, a second surface opposed to the first surface and a peripheral surface. The array of electrically conductive leads protrude from the peripheral surface with areas of the second surface of the encapsulation arranged between adjacent leads. LDS structured areas of the second surface located between adjacent leads in the array of electrically conductive leads provide a further array of electrically conductive leads exposed at the second surface. First and second electrically conductive vias extending through the encapsulation material as well as electrically conductive lines over the encapsulation material provide an electrical bonding pattern between the semiconductor chip and selected ones of the leads.

公开(公告)号：US20220238473A1

公开(公告)日：2022-07-28

申请号：US17573172

申请日：2022-01-11

Applicant: STMicroelectronics S.r.l.

Inventor： Dario VITELLO ,  Michele DERAI

IPC: H01L23/00 ,  H01L23/495

Abstract: A semiconductor chip includes an electrical contact layer covered by a passivation layer. The semiconductor chip is encapsulated in an encapsulation formed by laser-direct-structuring (LDS) material. Laser beam energy is applied to the encapsulation to structure therein a through via passing through the encapsulation and removing the passivation layer at a bonding site of the electrical contact layer of the at least one semiconductor chip. The through via structured in the encapsulation is made electrically conductive so that the electrically-conductive through via is electrically coupled to, optionally in direct contact with, the electrical contact layer at a bonding site where the passivation layer has been removed.

公开(公告)号：US20220199564A1

公开(公告)日：2022-06-23

申请号：US17549515

申请日：2021-12-13

Applicant: STMicroelectronics S.r.l.

Inventor： Michele DERAI ,  Guendalina CATALANO

IPC: H01L23/00 ,  H01L23/495

Abstract: A semiconductor device includes a support substrate with leads arranged therearound, a semiconductor die on the support substrate, and a layer of laser-activatable material molded onto the die and the leads. The leads include proximal portions facing towards the support substrate and distal portions facing away from the support substrate. The semiconductor die includes bonding pads at a front surface thereof which is opposed to the support substrate, and is arranged onto the proximal portions of the leads. The semiconductor device has electrically-conductive formations laser-structured at selected locations of the laser-activatable material. The electrically-conductive formations include first vias extending between the bonding pads and a front surface of the laser-activatable material, second vias extending between the distal portions of the leads and the front surface of the laser-activatable material, and lines extending at the front surface of the laser-activatable material and connecting selected first vias to selected second vias.