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公开(公告)号:US10788920B2
公开(公告)日:2020-09-29
申请号:US15797814
申请日:2017-10-30
Applicant: STMicroelectronics S.r.l.
Inventor: Roberto Pio Baorda , Paolo Angelini , Danilo Karim Kaddouri
Abstract: A differential current conveyor circuit includes two or more single-ended current conveyor stages and a common bias stage. First and second switches are set between the control terminals of the transistors in the common bias stage and a respective one of a first and a second coupling line of the single ended stages can be switched between the following: a reset state of the circuit with the transistors in the common bias stage coupled to the first and second coupling lines with the single-ended stages set to a bias condition; and a sensing state of the circuit with the transistors in the common bias stage decoupled from the first and second coupling lines, with the single-ended stages in a high impedance state with the control terminals of the input transistors of the single ended stages capacitively coupled to the input terminal.
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公开(公告)号:US11811298B2
公开(公告)日:2023-11-07
申请号:US17533519
申请日:2021-11-23
Applicant: STMicroelectronics S.r.l.
Inventor: Stefano Ramorini , Roberto Pio Baorda
CPC classification number: H02M1/0009 , H02M3/158
Abstract: A sensor circuit for a power FET monitors current flowing through the FET and includes a regulator circuit regulating a first current flowing through a sense resistance, so voltage drop at the sense resistance corresponds to voltage drop between terminals of the FET. A measurement circuit provides a second current corresponding (or being proportional) to the first current. A first switch selectively applies the second current to a resistor based on a first control signal, and a low pass filter generates a low-pass filtered signal by filtering voltage at the resistor. A voltage follower generates a replica of the low-pass filtered signal, and a second switch selectively applies the replica to the resistor. When the FET is closed, a control circuit closes the first switch and opens the second electronic switch. When the FET is opened, the control circuit opens the first electronic switch and closes the second electronic switch.
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公开(公告)号:US11075580B2
公开(公告)日:2021-07-27
申请号:US16849034
申请日:2020-04-15
Applicant: STMicroelectronics S.r.l.
Inventor: Roberto Pio Baorda , Stefano Ramorini , Paolo Angelini
Abstract: A sensor comprises a first transistor comprising a first control terminal, a second transistor that is a scaled version of and connected to the first transistor and comprising a second control terminal, an operational amplifier connected to both the first and second transistors and configured to generate an intermediate signal at an output terminal, a variable current source, a current mirror, a measurement circuit, and a chopper circuit. The first and second control terminals are configured to receive a drive signal. The variable current source is configured to generate a first variable current as a function of the intermediate signal. The current mirror configured to apply a second variable current proportional to the first variable current to the second transistor. The measurement circuit is configured to generate a measurement signal indicative of current through the first transistor. The chopper circuit is configured to shift an offset of the operation amplifier.
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公开(公告)号:US11675024B2
公开(公告)日:2023-06-13
申请号:US17211149
申请日:2021-03-24
Applicant: STMicroelectronics S.r.l.
Inventor: Paolo Angelini , Roberto Pio Baorda , Danilo Karim Kaddouri
CPC classification number: G01R33/0017 , G01R33/07 , G01R33/075 , G01R15/202
Abstract: Hall sensing signals are received in a spinning readout pattern of subsequent readout phases, wherein the pattern is cyclically repeated at a spinning frequency and a polarity of the Hall sensor signals is reversed in two non-adjacent readout phases of the readout pattern. A signal storage circuit includes signal storage capacitors. An accumulation circuit includes accumulation capacitors. A switch network is selectively actuated to couple the signal storage capacitors with the accumulation capacitors synchronously with phases in the spinning readout pattern in subsequent alternating first and second periods. The spinning output is stored with alternating opposite signs on the signal storage capacitors and the Hall sensing signals are stored in the signal storage capacitors and then accumulated on the accumulation capacitors with alternate signs in subsequent periods. The accumulated output signal is then demodulated with a demodulation frequency half the spinning frequency.
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公开(公告)号:US10928464B2
公开(公告)日:2021-02-23
申请号:US16149937
申请日:2018-10-02
Applicant: STMicroelectronics S.r.l.
Inventor: Roberto Pio Baorda , Paolo Angelini
Abstract: A Hall sensor compensation circuit includes an input node configured for receiving a bias signal for a Hall sensor. A bias node provides to the Hall sensor a compensated bias signal. A compensation network coupled between the input node and the bias node has a gain inversely proportional to Hall mobility, μn′, wherein the Hall sensing signal is temperature-compensated.
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公开(公告)号:US10794738B2
公开(公告)日:2020-10-06
申请号:US16049262
申请日:2018-07-30
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Dario Paci , Francesco Procopio , Carlo Valzasina , Paolo Angelini , Francesco Diazzi , Roberto Pio Baorda , Danilo Karim Kaddouri
Abstract: An integrated sensor device including a first die, housing a sensor element to detect a quantity external to the sensor device and transduce the external quantity into an electrical sensing signal; a second die mechanically coupled to the first die so that the first and second dies are stacked on one another along one and the same axis; and at least one heater of a resistive type integrated in the first die and/or in the second die, having a first conduction terminal and a second conduction terminal configured to couple respective first and second conduction terminals of a signal generator for causing an electric current to flow, in use, between the first and second conduction terminals of the heater and generate heat by the Joule effect. It is possible to carry out calibration in temperature of the sensor element.
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公开(公告)号:US10528197B2
公开(公告)日:2020-01-07
申请号:US15689908
申请日:2017-08-29
Applicant: STMicroelectronics S.r.l.
Inventor: Danilo Karim Kaddouri , Roberto Pio Baorda , Paolo Angelini
Abstract: A circuit includes a first transistor having a control terminal and a current path between first and second current path terminals. A second transistor has a control terminal and a current path between first and second current path terminals. The first current path terminal of the first transistor is coupled to the first current path terminal of the second transistor at an intermediate point. A first current buffer has an input and an output. The input of the first current buffer is coupled to the second current path terminal of the first transistor. A second current buffer has an input and an output, the input of the second current buffer being coupled to the second current path terminal of the second transistor. A summation node is coupled to the outputs of the first and second current buffer.
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公开(公告)号:US11761992B2
公开(公告)日:2023-09-19
申请号:US17664522
申请日:2022-05-23
Applicant: STMicroelectronics S.r.l.
Inventor: Paolo Angelini , Roberto Pio Baorda , Francesco Borgioli
IPC: G01R19/00 , H02J50/12 , G01R1/20 , G01R19/165
CPC classification number: G01R19/0092 , G01R1/203 , G01R19/16533 , H02J50/12 , H03F2200/481
Abstract: A current measurement circuit, for wireless charging systems, for instance, comprises a differential input configured to have applied an input voltage sensed across a shunt resistor traversed by a current to be measured, a voltage reversal switch arrangement selectively switchable to reverse the polarity of the input voltage as applied between a first and a second voltage sensing nodes as well as a first and a second current flow line between the voltage sensing nodes and ground. A difference resistor intermediate the two current flow lines is traversed by a current which is a function of the input voltage as applied to the first and second sensing nodes via the voltage reversal switch arrangement. First and second current sensing nodes at the two current flow lines are coupled to a differential current output via a current reversal switch arrangement selectively switchable to reverse the output current polarity.
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公开(公告)号:US20220283202A1
公开(公告)日:2022-09-08
申请号:US17664522
申请日:2022-05-23
Applicant: STMicroelectronics S.r.l.
Inventor: Paolo Angelini , Roberto Pio Baorda , Francesco Borgioli
IPC: G01R19/00 , H02J50/12 , G01R1/20 , G01R19/165
Abstract: A current measurement circuit, for wireless charging systems, for instance, comprises a differential input configured to have applied an input voltage sensed across a shunt resistor traversed by a current to be measured, a voltage reversal switch arrangement selectively switchable to reverse the polarity of the input voltage as applied between a first and a second voltage sensing nodes as well as a first and a second current flow line between the voltage sensing nodes and ground. A difference resistor intermediate the two current flow lines is traversed by a current which is a function of the input voltage as applied to the first and second sensing nodes via the voltage reversal switch arrangement. First and second current sensing nodes at the two current flow lines are coupled to a differential current output via a current reversal switch arrangement selectively switchable to reverse the output current polarity.
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公开(公告)号:US20220173657A1
公开(公告)日:2022-06-02
申请号:US17533519
申请日:2021-11-23
Applicant: STMicroelectronics S.r.l.
Inventor: Stefano Ramorini , Roberto Pio Baorda
Abstract: A sensor circuit for a power FET monitors current flowing through the FET and includes a regulator circuit regulating a first current flowing through a sense resistance, so voltage drop at the sense resistance corresponds to voltage drop between terminals of the FET. A measurement circuit provides a second current corresponding (or being proportional) to the first current. A first switch selectively applies the second current to a resistor based on a first control signal, and a low pass filter generates a low-pass filtered signal by filtering voltage at the resistor. A voltage follower generates a replica of the low-pass filtered signal, and a second switch selectively applies the replica to the resistor. When the FET is closed, a control circuit closes the first switch and opens the second electronic switch. When the FET is opened, the control circuit opens the first electronic switch and closes the second electronic switch.
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