Differential current conveyor circuit, corresponding device, and method of operation thereof

    公开(公告)号:US10788920B2

    公开(公告)日:2020-09-29

    申请号:US15797814

    申请日:2017-10-30

    Abstract: A differential current conveyor circuit includes two or more single-ended current conveyor stages and a common bias stage. First and second switches are set between the control terminals of the transistors in the common bias stage and a respective one of a first and a second coupling line of the single ended stages can be switched between the following: a reset state of the circuit with the transistors in the common bias stage coupled to the first and second coupling lines with the single-ended stages set to a bias condition; and a sensing state of the circuit with the transistors in the common bias stage decoupled from the first and second coupling lines, with the single-ended stages in a high impedance state with the control terminals of the input transistors of the single ended stages capacitively coupled to the input terminal.

    Hall sensor readout circuit, corresponding device and method

    公开(公告)号:US11675024B2

    公开(公告)日:2023-06-13

    申请号:US17211149

    申请日:2021-03-24

    CPC classification number: G01R33/0017 G01R33/07 G01R33/075 G01R15/202

    Abstract: Hall sensing signals are received in a spinning readout pattern of subsequent readout phases, wherein the pattern is cyclically repeated at a spinning frequency and a polarity of the Hall sensor signals is reversed in two non-adjacent readout phases of the readout pattern. A signal storage circuit includes signal storage capacitors. An accumulation circuit includes accumulation capacitors. A switch network is selectively actuated to couple the signal storage capacitors with the accumulation capacitors synchronously with phases in the spinning readout pattern in subsequent alternating first and second periods. The spinning output is stored with alternating opposite signs on the signal storage capacitors and the Hall sensing signals are stored in the signal storage capacitors and then accumulated on the accumulation capacitors with alternate signs in subsequent periods. The accumulated output signal is then demodulated with a demodulation frequency half the spinning frequency.

    Current conveyor circuit, corresponding device, apparatus and method

    公开(公告)号:US10528197B2

    公开(公告)日:2020-01-07

    申请号:US15689908

    申请日:2017-08-29

    Abstract: A circuit includes a first transistor having a control terminal and a current path between first and second current path terminals. A second transistor has a control terminal and a current path between first and second current path terminals. The first current path terminal of the first transistor is coupled to the first current path terminal of the second transistor at an intermediate point. A first current buffer has an input and an output. The input of the first current buffer is coupled to the second current path terminal of the first transistor. A second current buffer has an input and an output, the input of the second current buffer being coupled to the second current path terminal of the second transistor. A summation node is coupled to the outputs of the first and second current buffer.

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