公开(公告)号：US20040223359A1

公开(公告)日：2004-11-11

申请号：US10695239

申请日：2003-10-27

Applicant: STMicroelectronics, Inc.

Inventor： David C. McClure

IPC: G11C011/00

CPC classification number: G11C11/4125

Abstract: A method and circuit are disclosed for an integrated circuit having one or more memory cells, each memory cell including first and second p-channel transistor and first and second n-channel transistors configured as cross-coupled logic inverters between first and second reference voltage levels during a normal mode of operation. Power control circuitry is coupled to a source terminal of the first p-channel transistor of each memory cell for providing to the first p-channel transistors the first reference voltage level during the normal mode of operation. This causes a first voltage less than the first reference voltage level to appear at the source terminal of the first p-channel transistors during a data corruption mode of operation wherein data stored in the one or more memory cells is corrupted.

Abstract translation: 公开了一种用于具有一个或多个存储单元的集成电路的方法和电路，每个存储单元包括第一和第二p沟道晶体管，以及第一和第二n沟道晶体管，被配置为第一和第二参考电压电平之间的交叉耦合逻辑反相器 在正常操作模式下。 功率控制电路耦合到每个存储单元的第一p沟道晶体管的源极端子，以在正常操作模式期间向第一p沟道晶体管提供第一参考电压电平。 这导致在数据损坏操作模式期间，小于第一参考电压电平的第一电压出现在第一p沟道晶体管的源极端，其中存储在一个或多个存储器单元中的数据被破坏。

公开(公告)号：US20040160330A1

公开(公告)日：2004-08-19

申请号：US10754023

申请日：2004-01-08

Applicant: STMicroelectronics, Inc.

Inventor： David C. McClure ,  Tom Youssef

IPC: G08B021/00

CPC classification number: G11C5/141 ,  Y10T307/615 ,  Y10T307/625 ,  Y10T307/826

Abstract: An integrated circuit and method for providing a switchover from the primary power source to the secondary power source to prevent a volatile element from losing stored data. The integrated circuit includes a forced power source switchover circuit for detecting that the supply level of the primary power source drops below a predefined threshold level. A switchover circuit on the integrated circuit initiates a switchover operation based upon the forced power source switchover circuit detecting that the supply level being received from the primary power source drops below the predefined threshold level. The detection by the forced power source switchover circuitry may occur on a signal level that transitions faster than a predetermined negative rate of change. The integrated circuit may be incorporated in any system having volatile elements, such as memory or a clock.

公开(公告)号：US20030206462A1

公开(公告)日：2003-11-06

申请号：US10436801

申请日：2003-05-12

Applicant: STMicroelectronics, Inc.

Inventor： David C. McClure

IPC: G11C029/00

CPC classification number: G11C29/50 ,  G11C11/22 ,  G11C2029/5004

Abstract: A test circuit and method are disclosed for testing memory cells of a ferroelectric memory device having an array of ferroelectric memory cells. The test circuitry is coupled to the column lines, for selectively sensing voltage levels appearing on the column lines and providing externally to the ferroelectric memory device an electrical signal representative of the sensed voltage levels. In this way, ferroelectric memory cells exhibiting degraded performance may be identified.

公开(公告)号：US20030210599A1

公开(公告)日：2003-11-13

申请号：US10442844

申请日：2003-05-20

Applicant: STMICROELECTRONICS, INC.

Inventor： David C. McClure

IPC: G11C005/00

CPC classification number: G11C29/027 ,  G11C11/22 ,  G11C11/41 ,  G11C14/00 ,  G11C29/50 ,  G11C2029/5004

Abstract: A memory device having a first and a second memory section, the first and the second memory sections being coupled to bit lines. The second memory section may include at least one fuse. The first memory section includes a volatile memory and the second memory section includes a non-volatile memory. The volatile memory may be static or dynamic random access memory. The memory device may further include a control circuit connected to the at least one fuse to provide for prelaser testing.

公开(公告)号：US20020158684A1

公开(公告)日：2002-10-31

申请号：US09846523

申请日：2001-04-30

Applicant: STMicroelectronics, Inc.

Inventor： David C. McClure

IPC: H03B001/00

CPC classification number: G01R19/16538

Abstract: A circuit and method are disclosed for monitoring the voltage level of an electrical signal, such as an unregulated power supply. The circuit includes a comparator that compares the electrical to the voltage reference and generates an output having a value that is based upon the comparison. A oscillation suppression circuit receives the output of the comparator and generates an output signal that follows the output of the comparator once the output of the comparator remains stable and in the same logic state for a predetermined of time.

Abstract translation: 公开了一种用于监测电信号的电压电平（例如未调节电源）的电路和方法。 该电路包括比较器，该比较器将电与参考电压进行比较，并产生具有基于该比较的值的输出。 振荡抑制电路接收比较器的输出，并且在比较器的输出保持稳定并且处于相同的逻辑状态一段预定的时间之后，产生跟随比较器的输出的输出信号。

公开(公告)号：US20020158673A1

公开(公告)日：2002-10-31

申请号：US09846524

申请日：2001-04-30

Applicant: STMicroelectronics, Inc.

Inventor： David C. McClure ,  Rong Yin

IPC: H03K005/153

CPC classification number: G01R19/16547

Abstract: A circuit and method are disclosed for monitoring the voltage level of an unregulated power supply. The circuit includes a voltage reference circuit for generating a first reference voltage signal and a trim circuit which generates a trimmed reference voltage signal based upon the first reference voltage signal. A comparator compares the unregulated power supply voltage to the trimmed reference voltage signal and asserts an output signal based upon the comparison. The output signal is fed back as an input to the trim circuit so that the trim circuit provides a hysteresis effect.

Abstract translation: 公开了一种用于监测未调节电源的电压电平的电路和方法。 电路包括用于产生第一参考电压信号的电压参考电路和基于第一参考电压信号产生修整的参考电压信号的微调电路。 比较器将未调节的电源电压与修整的参考电压信号进行比较，并根据比较确定输出信号。 输出信号作为输入反馈到微调电路，使得微调电路提供滞后效应。