公开(公告)号：US20030148588A1

公开(公告)日：2003-08-07

申请号：US10331189

申请日：2002-12-26

Applicant: STMicroelectronics S.r.l.

Inventor： Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

IPC: H01L021/76

CPC classification number: H01L21/76262 ,  H01L21/31662 ,  H01L21/76208

Abstract: For manufacturing an SOI substrate, the following steps are carried out: providing a wafer of semiconductor material; forming, inside the wafer, a plurality of passages forming a labyrinthine cavity and laterally delimiting a plurality of pillars of semiconductor material; and oxidizing the pillars of semiconductor material to form a buried insulating layer. For forming the labyrinthine cavity, a trench is first formed in a substrate; an epitaxial layer is grown, which closes the trench at the top; the wafer is annealed so as to deform the pillars and cause them to assume a minimum-energy handlebar-like shape, and a peripheral portion of the wafer is removed to reach the labyrinthine cavity, and side inlet openings are formed in the labyrinthine cavity. Oxidation is performed by feeding an oxidizing fluid through the side inlet openings.

Abstract translation: 为了制造SOI衬底，进行以下步骤：提供半导体材料的晶片; 在所述晶片内部形成多个通道，所述多个通道形成迷宫腔并横向界定多个半导体材料柱; 并氧化半导体材料的柱以形成掩埋绝缘层。 为了形成迷宫腔，首先在衬底中形成沟槽; 生长外延层，其封闭顶部的沟槽; 将晶片退火以使柱变形并使其呈现最小能量手柄形状，并且移除晶片的周边部分以到达迷宫腔，并且在迷宫腔中形成侧入口。 氧化是通过将侧面入口进入氧化流体进行的。

公开(公告)号：US20040106290A1

公开(公告)日：2004-06-03

申请号：US10712211

申请日：2003-11-12

Applicant: STMicroelectronics S.r.l.

Inventor： Pietro Erratico ,  Enrico Sacchi ,  Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

IPC: H01L021/302 ,  H01L021/461

CPC classification number: B81C1/00404

Abstract: The process comprises the steps of forming, on top of a semiconductor material wafer, a holed mask having a lattice structure and comprising a plurality of openings each having a substantially square shape and a side with an inclination of 45null with respect to the flat of the wafer; carrying out an anisotropic etch in TMAH of the wafer, using said holed mask, thus forming a cavity, the cross section of which has the shape of an upside-down isosceles trapezium; and carrying out a chemical vapor deposition using TEOS, thus forming a TEOS layer which completely closes the openings of the holed mask and defines a diaphragm overlying the cavity and on which a suspended integrated structure can subsequently be manufactured.

Abstract translation: 该方法包括以下步骤：在半导体材料晶片的顶部上形成具有格子结构的孔掩模，并且包括多个开口，每个开口具有大致正方形的形状，并且相对于平面的平面倾斜45° 晶圆; 在晶片的TMAH中进行各向异性蚀刻，使用所述带孔掩模，从而形成空腔，其横截面具有倒立的等腰梯形的形状; 并且使用TEOS进行化学气相沉积，由此形成TEOS层，其完全封闭了孔罩的开口，并且限定了覆盖在空腔上的隔膜，并且随后可以制造悬浮的一体结构。