公开(公告)号：US09142448B2

公开(公告)日：2015-09-22

申请号：US14356393

申请日：2012-11-02

申请人： The Silanna Group Pty Ltd

发明人： Andrew John Brawley ,  Petar Branko Atanackovic ,  Andrew John Black ,  Yong Cheow Gary Lim

IPC分类号： H01L21/762 ,  H01L27/12 ,  H01L29/772 ,  H01L21/20 ,  H01L21/84 ,  H01L29/786

CPC分类号： H01L21/76251 ,  H01L21/2007 ,  H01L21/76254 ,  H01L21/76262 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/78603

摘要： A method of producing a silicon-on-insulator article, the method including: forming a first aluminum nitride layer thermally coupled to a first silicon substrate; forming a second aluminum nitride layer thermally coupled to a second substrate, the second substrate including at least a surface layer of silicon; bonding the first and second aluminum nitride layers of the first and second substrates together so that the first and second aluminum nitride layers are disposed between the first and second substrates; and removing most of the second substrate to leave a layer of silicon that is electrically insulated from but thermally coupled to the first silicon substrate by the first and second aluminum nitride layers.

摘要翻译： 一种制造绝缘体上硅产品的方法，所述方法包括：形成热耦合到第一硅衬底的第一氮化铝层; 形成热耦合到第二衬底的第二氮化铝层，所述第二衬底至少包括硅的表面层; 将第一和第二基板的第一和第二氮化铝层接合在一起，使得第一和第二氮化铝层设置在第一和第二基板之间; 并且去除大部分第二衬底以留下通过第一和第二氮化铝层与第一硅衬底电绝缘但与第一硅衬底热耦合的硅层。

公开(公告)号：US20140312424A1

公开(公告)日：2014-10-23

申请号：US14356393

申请日：2012-11-02

申请人： The Silanna Group Pty Ltd.

发明人： Andrew John Brawley ,  Petar Branko Atanackovic ,  Andrew John Black ,  Yong Cheow Gary Lim

IPC分类号： H01L21/762 ,  H01L27/12

CPC分类号： H01L21/76251 ,  H01L21/2007 ,  H01L21/76254 ,  H01L21/76262 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/78603

摘要： A method of producing a silicon-on-insulator article, the method including: forming a first aluminium nitride layer thermally coupled to a first silicon substrate; forming a second aluminium nitride layer thermally coupled to a second substrate, the second substrate including at least a surface layer of silicon; bonding the first and second aluminium nitride layers of the first and second substrates together so that the first and second aluminium nitride layers are disposed between the first and second substrates; and removing most of the second substrate to leave a layer of silicon that is electrically insulated from but thermally coupled to the first silicon substrate by the first and second aluminium nitride layers.

摘要翻译： 一种制造绝缘体上硅产品的方法，所述方法包括：形成热耦合到第一硅衬底的第一氮化铝层; 形成热耦合到第二衬底的第二氮化铝层，所述第二衬底至少包括硅的表面层; 将第一和第二基板的第一和第二氮化铝层接合在一起，使得第一和第二氮化铝层设置在第一和第二基板之间; 并且去除大部分第二衬底以留下通过第一和第二氮化铝层与第一硅衬底电绝缘但与第一硅衬底热耦合的硅层。

公开(公告)号：US20140231964A1

公开(公告)日：2014-08-21

申请号：US13770438

申请日：2013-02-19

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Long-Shih Lin ,  Fu-Hsiung Yang ,  Kun-Ming Huang ,  Ming-Yi Lin ,  Paul Chu

IPC分类号： H01L29/36 ,  H01L21/02

CPC分类号： H01L21/02532 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/0257 ,  H01L21/02587 ,  H01L21/76262 ,  H01L29/0619 ,  H01L29/36 ,  H01L29/66325 ,  H01L29/7394

摘要： A substrate for an integrated circuit includes a device wafer having a raw carrier concentration and an epitaxial layer disposed over the device wafer. The epitaxial layer has a first carrier concentration. The first carrier concentration is higher than the raw carrier concentration.

摘要翻译： 用于集成电路的衬底包括具有原始载流子浓度的器件晶片和设置在器件晶片上的外延层。 外延层具有第一载流子浓度。 第一载流子浓度高于原载流子浓度。

公开(公告)号：US20060234479A1

公开(公告)日：2006-10-19

申请号：US11107712

申请日：2005-04-15

申请人： Jinping Liu ,  Dong Sohn ,  Liang Hsia

发明人： Jinping Liu ,  Dong Sohn ,  Liang Hsia

IPC分类号： H01L21/20 ,  H01L21/265 ,  H01L21/36 ,  H01L31/20

CPC分类号： H01L29/1054 ,  H01L21/02381 ,  H01L21/02395 ,  H01L21/02447 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/02664 ,  H01L21/76262 ,  H01L29/78 ,  Y10S438/933

摘要： A method of fabrication of semiconductor substrate structure comprising the following. A buffer layer is formed on the Si Substrate. We form a SiGe layer on the novel buffer layer. The buffer layer has defects therein so that the buffer layer is oxidized to form a buried isolation layer comprised of silicon oxide and an oxide layer and oxidize the SiGe layer for form a oxide layer. The oxide layer is then removed. An upper semiconductor layer (e.g., Si, SiGe or Ge layer) is epitaxially formed on the SiGe layer. Devices are formed on said an upper semiconductor layer. The buffer layer can be formed by several aspects.

摘要翻译： 一种制造半导体衬底结构的方法，包括以下步骤。 在Si基板上形成缓冲层。 我们在新型缓冲层上形成SiGe层。 缓冲层在其中具有缺陷，使得缓冲层被氧化以形成由氧化硅和氧化物层组成的掩埋隔离层，并氧化SiGe层以形成氧化物层。 然后除去氧化物层。 在SiGe层上外延形成上半导体层（例如Si，SiGe或Ge层）。 器件形成在所述上半导体层上。 缓冲层可以由几个方面形成。

公开(公告)号：US07015121B2

公开(公告)日：2006-03-21

申请号：US10910578

申请日：2004-08-04

申请人： Yuichiro Mitani ,  Yukie Nishikawa

发明人： Yuichiro Mitani ,  Yukie Nishikawa

IPC分类号： H01L21/20

CPC分类号： H01L21/02609 ,  H01L21/02532 ,  H01L21/02675 ,  H01L21/2022 ,  H01L21/28017 ,  H01L21/28035 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/76262 ,  H01L29/4908 ,  H01L29/4916 ,  H01L29/517 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/66772 ,  H01L29/78675

摘要： A method of manufacturing a semiconductor device comprises a step of depositing a crystalline insulating layer oriented in a predetermined crystal face orientation by epitaxial growth on an amorphous semiconductor layer, a step of depositing a second amorphous semiconductor layer on the crystalline insulating layer, a step of growing said first and second semiconductor layers into a polycrystal or single crystal layer in a solid phase, using said crystalline insulating film as core, and a step of forming a functional element containing said first and second semiconductor layer.

公开(公告)号：US20040266145A1

公开(公告)日：2004-12-30

申请号：US10611042

申请日：2003-06-30

发明人： Mike Morse

IPC分类号： H01L021/20

CPC分类号： H01L31/105 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/76262 ,  H01L29/78609 ,  H01L29/78687 ,  H01L31/1812 ,  Y02E10/50

摘要： A method of forming a high germanium concentration, low defect density silicon germanium film and its associated structures is described, comprising forming a dielectric layer on a substrate, patterning the dielectric layer to form a silicon region and at least one dielectric region, and forming a low defect silicon germanium layer on at least one dielectric region.

摘要翻译： 描述了形成高锗浓度，低缺陷密度硅锗膜及其相关结构的方法，包括在衬底上形成电介质层，图案化介电层以形成硅区和至少一个电介质区，并形成 在至少一个电介质区域上的低缺陷硅锗层。

公开(公告)号：US20040227207A1

公开(公告)日：2004-11-18

申请号：US10667113

申请日：2003-09-18

申请人： STMicroelectronics S.r.l.

发明人： Gabriele Barlocchi ,  Flavio Villa

IPC分类号： H01L029/00 ,  H01L021/331

CPC分类号： H01L21/2007 ,  H01L21/30608 ,  H01L21/3086 ,  H01L21/76251 ,  H01L21/76262 ,  H01L21/764

摘要： A method of forming buried cavities in a wafer of monocrystalline semiconductor material with at least one cavity formed in a substrate of monocrystalline semiconductor material by timed TMAH etching silicon; covering the cavity with a material inhibiting epitaxial growth; and growing a monocrystalline epitaxial layer above the substrate and the cavities. Thereby, the cavity is completely surrounded by monocrystalline material. Starting from this wafer, it is possible to form a thin membrane. The original wafer must have a plurality of elongate cavities or channels, parallel and adjacent to one another. Trenches are then excavated in the epitaxial layer as far as the channels, and the dividers between the channels are removed by timed TMAH etching.

摘要翻译： 在单晶半导体材料的晶片中形成掩埋空穴的方法，其中至少一个腔通过定时TMAH蚀刻硅在单晶半导体材料的衬底中形成; 用抑制外延生长的材料覆盖空腔; 以及在衬底和空腔上生长单晶外延层。 因此，腔体被单晶材料完全包围。 从该晶片开始，可以形成薄膜。 原始晶片必须具有彼此平行并相邻的多个细长空腔或通道。 然后在外延层中挖沟直到沟道，并且通过定时TMAH蚀刻去除沟道之间的分隔线。

公开(公告)号：US20040014302A1

公开(公告)日：2004-01-22

申请号：US10199123

申请日：2002-07-22

发明人： Peter G. Tolchinsky ,  Irwin Yablok ,  Mohamad A. Shaheen

IPC分类号： H01L021/425

CPC分类号： H01L21/76254 ,  H01L21/76243 ,  H01L21/76256 ,  H01L21/76262

摘要： A method is provided for fabricating an SOI water. This may involve forming a silicon substrate and implanting oxygen into the substrate. Damaged portions of the implanted silicon may be healed/cured by CMP or anneal, for example. An epi layer may then be deposited over the healed/cured regions of the substrate. The substrate may then be annealed to form an insulative layer. The wafer may be thinned to provide the proper thickness of the epi layer.

摘要翻译： 提供了制造SOI水的方法。 这可能涉及形成硅衬底并将氧注入到衬底中。 植入的硅的损伤部分可以例如通过CMP来愈合/固化或退火。 然后可以将epi层沉积在衬底的愈合/固化区域上。 然后可以将衬底退火以形成绝缘层。 可以使晶片变薄以提供外延层的适当厚度。

公开(公告)号：US06506663B1

公开(公告)日：2003-01-14

申请号：US09457623

申请日：1999-12-08

申请人： Gabriele Barlocchi ,  Flavio Villa

发明人： Gabriele Barlocchi ,  Flavio Villa

IPC分类号： H01L2176

CPC分类号： H01L21/76262

摘要： A method for providing an SOI wafer that includes, on a wafer of monocrystalline semiconductor material, forming a hard mask of an oxidation-resistant material, defining first protective regions covering first portions of the wafer; excavating the second portions of the wafer, forming initial trenches extending between the first portions of the wafer; thermally oxidating the wafer, forming a sacrificial oxide layer extending at the lateral and base walls of the initial trenches, below the first protective regions; and wet etching the wafer, to completely remove the sacrificial oxide layer. Thereby, intermediate trenches are formed, the lateral walls of which are recessed with respect to the first protective regions. Subsequently, a second oxide layer is formed inside the intermediate trenches; a second silicon nitride layer is deposited; final trenches are produced; a buried oxide region is formed, and finally an epitaxial layer is grown.

摘要翻译： 一种用于提供SOI晶片的方法，所述SOI晶片包括在单晶半导体材料的晶片上，形成覆盖所述晶片的第一部分的第一保护区域的抗氧化材料的硬掩模; 挖掘晶片的第二部分，形成在晶片的第一部分之间延伸的初始沟槽; 热氧化所述晶片，在所述第一保护区下方形成在所述初始沟槽的侧壁和底壁处延伸的牺牲氧化物层; 并湿式蚀刻晶片，以完全去除牺牲氧化物层。 由此，形成中间沟槽，其侧壁相对于第一保护区域凹陷。 随后，在中间沟槽内部形成第二氧化物层; 沉积第二氮化硅层; 制作最后的壕沟; 形成掩埋氧化物区域，最后生长外延层。

公开(公告)号：US06479354B2

公开(公告)日：2002-11-12

申请号：US09819448

申请日：2001-03-28

申请人： Hong Bae Moon

发明人： Hong Bae Moon

IPC分类号： H01L21336

CPC分类号： H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/76262

摘要： A method of forming a semiconductor device with a SEG layer and isolating elements formed in the device includes forming an insulating layer for isolating elements on a silicon substrate. An open area is formed in the insulating layer to expose the surface of the silicon substrate by selectively etching the insulating layer. The open area in the insulating layer includes an inclined side wall at a positive angle of inclination. An epitaxial layer is selectively grown to have a top surface lower than the surface of the insulating layer, using the silicon exposed in the open area as a seed. A sacrificial oxide layer is formed on the surface of the silicon of the epitaxial growth, and the sacrificial oxide layer is then removed.

摘要翻译： 形成具有SEG层的半导体器件和形成在器件中的隔离元件的方法包括形成用于在硅衬底上隔离元件的绝缘层。 通过选择性地蚀刻绝缘层，在绝缘层中形成开放区域以露出硅衬底的表面。 绝缘层中的开放区域包括呈倾斜角的倾斜侧壁。 使用暴露在开放区域中的硅作为种子，选择性地生长外延层以使其表面低于绝缘层的表面。 在外延生长的硅的表面上形成牺牲氧化物层，然后去除牺牲氧化物层。