公开(公告)号：US20250107066A1

公开(公告)日：2025-03-27

申请号：US18643311

申请日：2024-04-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bo Won Yoo ,  Jin Woo Han ,  Seok Han Park ,  Sung-Min Park ,  Gyu Hwan Oh

IPC: H10B12/00 ,  G11C5/06

Abstract: A semiconductor memory device includes a cell region element separation film that is on a substrate and includes first and second cell region side walls; an active pattern that is on the substrate; a word line that is on the first side wall of the active pattern; a back gate electrode that is on the second side wall of the active pattern; a bit line that is electrically connected to the first side of the active pattern; and a data storage pattern that is electrically connected to the second side of the active pattern, where the word line includes an electrode part and a plug connecting part, and where the plug connecting part of the word line includes a first connecting extending part and a second connecting extending part.

公开(公告)号：US20250081445A1

公开(公告)日：2025-03-06

申请号：US18660803

申请日：2024-05-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bo Won Yoo ,  Seok Han Park ,  Keun Ui Kim ,  Yu Jin Kim ,  Joong Chan Shin ,  Gyu Hwan Oh ,  Eun Suk Jang ,  Jin Woo Han

IPC: H10B12/00

Abstract: A semiconductor memory device includes a bit line extending in a first direction on a substrate, an active pattern on the bit line, a word line on a first sidewall of the active pattern and extending in a second direction, a back gate electrode on a second sidewall of the active pattern and extending in the second direction, a gate isolation pattern on the first sidewall of the active pattern and including a low-k pattern extending in the second direction, and a data storage pattern connected to the second surface of the active pattern. The word line is between the active pattern and the gate isolation pattern, and a vertical distance between the bit line and the word line is greater than a vertical distance between the bit line and the low-k pattern.