公开(公告)号：US09287159B2

公开(公告)日：2016-03-15

申请号：US14751011

申请日：2015-06-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Chul Kim ,  Jae-Seok Kim ,  Chan-Hong Park

IPC: H01L29/78 ,  H01L21/762 ,  H01L27/108 ,  H01L29/423 ,  H01L21/285 ,  H01L21/311 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L21/76224 ,  H01L21/28556 ,  H01L21/31111 ,  H01L21/76232 ,  H01L27/10876 ,  H01L27/10891 ,  H01L29/401 ,  H01L29/4236 ,  H01L29/6653 ,  H01L29/66553 ,  H01L29/78

Abstract: A device isolation layer of the memory device includes a first insulation layer in a lower portion of a device isolation trench, a second insulation layer in an upper portion of the device isolation trench and a separation layer between the first insulation layer and the second insulation layer. First and second conductive fillers are in the first and second insulation layers and are separated by the separation layer.

Abstract translation: 存储器件的器件隔离层包括在器件隔离沟槽的下部中的第一绝缘层，器件隔离沟槽的上部中的第二绝缘层和第一绝缘层与第二绝缘层之间的分离层 。 第一和第二导电填料位于第一和第二绝缘层中，并被分离层分离。

公开(公告)号：US20140061743A1

公开(公告)日：2014-03-06

申请号：US13945279

申请日：2013-07-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunchul Kim ,  Jae-Seok Kim ,  Chan-Hong Park

IPC: H01L27/088

CPC classification number: H01L27/088 ,  H01L27/10876 ,  H01L27/10891

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a substrate, a device isolation layer defining one or more active regions at the substrate, and one or more gate lines buried in the substrate. Each of the gate lines comprises a first portion on the device isolation layer and a second portion on an active region of the active regions. A top surface of the first portion is lower than a top surface of the second portion.

Abstract translation: 提供半导体器件及其制造方法。 半导体器件可以包括衬底，在衬底上限定一个或多个有源区的器件隔离层和埋在衬底中的一个或多个栅极线。 每个栅极线包括器件隔离层上的第一部分和有源区的有源区上的第二部分。 第一部分的顶表面比第二部分的顶表面低。

公开(公告)号：US09136270B2

公开(公告)日：2015-09-15

申请号：US14027372

申请日：2013-09-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Chul Kim ,  Jae-Seok Kim ,  Chan-Hong Park

IPC: H01L29/78 ,  H01L27/108 ,  H01L29/423 ,  H01L21/762

CPC classification number: H01L21/76224 ,  H01L21/28556 ,  H01L21/31111 ,  H01L21/76232 ,  H01L27/10876 ,  H01L27/10891 ,  H01L29/401 ,  H01L29/4236 ,  H01L29/6653 ,  H01L29/66553 ,  H01L29/78

Abstract: A device isolation layer of the memory device includes a first insulation layer in a lower portion of a device isolation trench, a second insulation layer in an upper portion of the device isolation trench and a separation layer between the first insulation layer and the second insulation layer. First and second conductive fillers are in the first and second insulation layers and are separated by the separation layer.

Abstract translation: 存储器件的器件隔离层包括在器件隔离沟槽的下部中的第一绝缘层，器件隔离沟槽的上部中的第二绝缘层和第一绝缘层与第二绝缘层之间的分离层 。 第一和第二导电填料位于第一和第二绝缘层中，并被分离层分离。