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    SERIAL INTERFACE RECEIVER AND AN OFFSET CALIBRATION METHOD THEREOF
    1.
    发明公开
    SERIAL INTERFACE RECEIVER AND AN OFFSET CALIBRATION METHOD THEREOF 审中-公开

    公开(公告)号：US20240347114A1

    公开(公告)日：2024-10-17

    申请号：US18384927

    申请日：2023-10-30

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Dam YUN ,  Dongyeon KWAG ,  Dongwoo BAEK ,  Jehyung YOON ,  Sangik CHO ,  Dae-Hoon HAN

    IPC: G11C16/30 ,  H03F3/45 ,  H03K17/56

    CPC classification number: G11C16/30 ,  H03F3/45475 ,  H03K17/56

    Abstract: A parallel e-fuse device including: a first e-fuse to receive an input voltage and transfer a first fuse current to an output terminal; and a second e-fuse to receive the input voltage and transfer a second fuse current to the output terminal, the first e-fuse includes: a power transistor to control the first fuse current according to a gate voltage; a clamp amplifier to provide a charging current to charge a gate of the power transistor, the charging current being obtained by monitoring a feedback voltage; a balance amplifier to provide a first sinking current to discharge the gate of the power transistor, the first sinking current being obtained by comparing a current sensing signal with a current monitoring signal, wherein the clamp amplifier generates the charging current according to a differential voltage between the feedback voltage and a reference voltage.

    BI-DIRECTIONAL CURRENT SENSOR, POWER MANAGEMENT INTEGRATED CIRCUIT AND CURRENT SENSING METHOD THEREOF
    3.
    发明公开
    BI-DIRECTIONAL CURRENT SENSOR, POWER MANAGEMENT INTEGRATED CIRCUIT AND CURRENT SENSING METHOD THEREOF 审中-公开

    公开(公告)号：US20240356444A1

    公开(公告)日：2024-10-24

    申请号：US18368339

    申请日：2023-09-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Dam YUN ,  Jaehyun PARK ,  Jehyung YOON ,  Sangik CHO

    IPC: H02M3/158 ,  H02M1/00

    CPC classification number: H02M3/1582 ,  H02M1/009

    Abstract: A bi-directional direct current to direct current (DC-DC) converter includes: an inductor; a first switching transistor configured to switch a power supply voltage to one end of the inductor, in response to a first driving signal; a second switching transistor configured to switch between one end of the inductor and a ground voltage, in response to a second driving signal; and a bi-directional current sensor configured to sense a bi-directional current flowing through the second switching transistor in a boost mode and a buck mode, based on a switching node voltage at a drain of the second switching transistor, wherein the bi-directional current sensor is further configured to generate a virtual voltage of a positive voltage in a negative feedback method regardless of the sign of the switching node voltage to copy the bi-directional current.

    DC-TO-DC CONVERTER WITH PULSE SKIPPING FUNCTION AND ON-TIME CONTROL FUNCTION, AND ELECTRONIC DEVICES INCLUDING THE SAME
    4.
    发明公开
    DC-TO-DC CONVERTER WITH PULSE SKIPPING FUNCTION AND ON-TIME CONTROL FUNCTION, AND ELECTRONIC DEVICES INCLUDING THE SAME 审中-公开

    公开(公告)号：US20230327548A1

    公开(公告)日：2023-10-12

    申请号：US18151115

    申请日：2023-01-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dam YUN ,  Jaekyu KIM ,  Jehyung YOON ,  Sangik CHO

    IPC: H02M3/157 ,  H02M1/08 ,  H02M1/00

    CPC classification number: H02M3/157 ,  H02M1/083 ,  H02M1/0009

    Abstract: Disclosed is a DC-to-DC converter which includes a first switching circuit connected between a power line receiving a DC voltage and an output terminal of the DC-to-DC converter and switched based on a first pulse control signal, a second switching circuit connected between the output terminal and a ground and switched based on a second pulse control signal, a pulse control signal generation circuit that receives a first level of a first voltage associated with an output voltage and a second level of a first reference voltage, wherein, in response to the second level being higher than the first level, the pulse control signal generation circuit is configured to generate the first pulse control signal to increase the output voltage and wherein, in response to the second level being lower than the first level, the pulse control signal generation circuit is configured to generate the second pulse control signal.

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