-
公开(公告)号:US20210358534A1
公开(公告)日:2021-11-18
申请号:US17139538
申请日:2020-12-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: HUNDAE CHOI , GARAM CHOI
IPC: G11C11/4076 , H03L7/081 , H03L7/085
Abstract: A multi-phase clock generator includes first and second variable delay lines, a first phase splitter configured to phase-split a first phase-delayed clock, output from a clock tree, to output a first divided clock and a third divided clock, a second phase splitter configured to phase-split a second phase-delayed clock, output from the clock tree, to output a second divided clock and a fourth divided clock, a first duty cycle detector configured to detect a first duty error between the first divided clock and the third divided clock, and a second duty cycle detector configured to detect a second duty error between the second divided clock and the fourth divided clock. The first variable delay line is controlled according to the first duty error, and the second variable delay line is controlled according to the second duty error.
-
公开(公告)号:US20240119997A1
公开(公告)日:2024-04-11
申请号:US18221598
申请日:2023-07-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: GARAM CHOI , Yonghun Kim , Jaewoo Lee , Kihan Kim , Hojun Chang
IPC: G11C11/4093 , G11C11/4074 , G11C11/4076
CPC classification number: G11C11/4093 , G11C11/4074 , G11C11/4076
Abstract: A semiconductor chip includes a write clock buffer, a voltage regulator, a process calibration circuit and a temperature calibration circuit. The voltage regulator generates plural regulated voltages. The process calibration circuit output one of the regulated voltages as a bias voltage of the write clock buffer, depending on a process variation of the semiconductor chip. The temperature calibration circuit track a temperature variation of the semiconductor chip in real time, performs analog calibration on the bias voltage from the process calibration circuit in real time depending on a result of the tracking, and outputs the analog-calibrated bias voltage to the write clock buffer.
-