INTEGRATED CIRCUIT INCLUDING PHASE LOCKED LOOP CIRCUIT

    公开(公告)号:US20200021298A1

    公开(公告)日:2020-01-16

    申请号:US16216226

    申请日:2018-12-11

    Abstract: A phase locked loop circuit includes a voltage controlled oscillator configured to output a clock signal having a predetermined frequency based in a control voltage, a phase frequency detector configured to compare the clock signal with a reference signal to output a first control signal and a second control signal, a charge pump configured to output the control voltage based on the first control signal and the second control signal, a voltage supply including an output terminal connected to an output terminal of the charge pump by a transmission switch, and a leakage remover circuit connected to the transmission switch and configured to remove a leakage current flowing through the transmission switch while the transmission switch is turned-off.

    PHASE LOCKED LOOP CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

    公开(公告)号:US20240106441A1

    公开(公告)日:2024-03-28

    申请号:US18466438

    申请日:2023-09-13

    CPC classification number: H03L7/093 G05F3/262 H03L1/00 H03L7/0995

    Abstract: A phase locked loop circuit and a semiconductor device are provided. The phased locked loop circuit includes a reference current generator configured to generate a summed compensation current in which at least one of a process change, a temperature change or a power supply voltage change are compensated and output the summed compensation current as a reference current, a current digital-to-analog converter configured to convert the reference current into a control current in accordance with a digital code and a voltage control oscillator configured to generate a signal based on the control current, wherein the summed compensation current is based on weighted-averaging a first type compensation current and a second type compensation current in response to at least one of the process change, the temperature change or the power supply voltage change.

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