Abstract:
The integrated circuit includes first and second vias, a first buffer configured to receive a signal transmitted from the first via, a second buffer configured to receive a signal transmitted from the second via, a first detour circuit configured to receive a signal transmitted through the second buffer, a second detour circuit configured to receive a signal transmitted through the first buffer, a first selector configured to selectively output one of the signal transmitted from the first via and a signal transmitted through the first detour circuit, and a second selector configured to selectively output one of the signal transmitted from the second via and a signal transmitted through the second detour circuit. Each of the first and second buffers and the first and second detour circuits transmits a signal in only one direction.