SEMICONDUCTOR DEVICE
    1.
    发明申请

    公开(公告)号:US20190081151A1

    公开(公告)日:2019-03-14

    申请号:US15915508

    申请日:2018-03-08

    Abstract: A semiconductor device includes an active region in a substrate, at least one nano-sheet on the substrate and spaced apart from a top surface of the active region, a gate above or below the nano-sheet, a gate insulating layer between the at least one nano-sheet and the gate, and source/drain regions on the active region at both sides of the at least one nano-sheet. The at least one nano-sheet includes a channel region; a gate disposed above or below the nano-sheet and including a single metal layer having different compositions of metal atoms of a surface and an inside thereof; a gate insulating layer between the nano-sheet and the gate; and source/drain regions disposed in the active region of both sides of the at least one nano-sheet.

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    2.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号:US20160351569A1

    公开(公告)日:2016-12-01

    申请号:US15164396

    申请日:2016-05-25

    Abstract: Provided are a semiconductor device in which a multi-threshold voltage is embodied by controlling a work function, and a method of manufacturing the same. The device includes a semiconductor substrate including a first region and a second region, a first active region formed in an upper portion of the first region of the semiconductor substrate, a second active region formed in an upper portion of the second region of the semiconductor substrate, a first gate structure formed on the semiconductor substrate across the first active region, the first gate structure including an interfacial layer, a high-k dielectric layer, a capping metal layer, and a work function metal layer that are stacked sequentially, and a second gate structure formed on the semiconductor substrate across the second active region, the second gate structure including the interfacial layer, the high-k dielectric layer, the capping metal layer, a dielectric layer, and the work function metal layer that are stacked sequentially.

    Abstract translation: 提供一种其中通过控制功函数来实现多阈值电压的半导体器件及其制造方法。 该器件包括:半导体衬底,包括第一区域和第二区域;形成在半导体衬底的第一区域的上部的第一有源区;形成在半导体衬底的第二区域的上部的第二有源区; 形成在跨过第一有源区的半导体衬底上的第一栅极结构,第一栅极结构包括依次层叠的界面层,高k电介质层,封盖金属层和功函数金属层,以及 第二栅极结构,形成在半导体衬底上跨越第二有源区,第二栅极结构包括依次层叠的界面层,高k电介质层,封盖金属层,电介质层和功函数金属层。

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