公开(公告)号：US20240120279A1

公开(公告)日：2024-04-11

申请号：US18471730

申请日：2023-09-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong Hyuk YIM ,  Wan Don KIM ,  Hyun Bae LEE ,  Hyo Seok CHOI ,  Geun Woo KIM

IPC: H01L23/535 ,  H01L21/768 ,  H01L23/528 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775

CPC classification number: H01L23/535 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76895 ,  H01L23/5286 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/775

Abstract: A semiconductor device may include a first film and a second film defining parts of a trench, a plug conductive film, a via, and a wiring in the trench. The trench may include a second sub-trench having a second width below a first sub-trench having a first width. The plug conductive film may extend from a first side of the first film to penetrate a bottom face of the trench. An uppermost face of the plug conducive film may be in the trench. The via may include an insulating liner between the plug conductive film and the first film. The uppermost face of the plug conductive film and at least a part of a side wall of the plug conductive film may be in contact with the wiring. An upper face of the insulating liner may be exposed by a bottom face of the second sub-trench.

公开(公告)号：US20220084952A1

公开(公告)日：2022-03-17

申请号：US17379000

申请日：2021-07-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jang Eun LEE ,  Min Joo LEE ,  Wan Don KIM ,  Hyeon Jin SHIN ,  Hyun Bae LEE ,  Hyun Seok LIM

IPC: H01L23/532

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate including an element isolation layer, the element isolation layer defining an active region, a plurality of word lines traversing the active region in a first direction, and a plurality of bit line structures on the substrate and connected to the active region, the plurality of bit line structures extending in a second direction different from the first direction. Each of the plurality of bit line structures includes a ruthenium line wiring including a bottom surface and a top surface opposite to the bottom surface, a lower graphene layer in contact with the bottom surface of the ruthenium line wiring and extending along the bottom surface of the ruthenium line wiring, and a wiring line capping layer extending along the top surface of the ruthenium line wiring.

公开(公告)号：US20220013467A1

公开(公告)日：2022-01-13

申请号：US17358752

申请日：2021-06-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jang Eun LEE ,  Min Joo LEE ,  Wan Don KIM ,  Hyun Bae LEE

IPC: H01L23/532 ,  H01L23/522 ,  H01L23/528

Abstract: A semiconductor device and a method for fabricating the same. The semiconductor device comprising: a first level wiring disposed at a first metal level, and includes a first line wiring, a first insulating capping film and a first side wall graphene film, the first insulating capping film extending along an upper surface of the first line wiring, and the first side wall graphene film extending along a side wall of the first line wiring; an interlayer insulating film covering the side wall of the first line wiring and a side wall of the first insulating capping film; and a second level wiring disposed at a second metal level higher than the first metal level, and includes a second via connected to the first line wiring, and a second line wiring connected to the second via, wherein the second via penetrates the first insulating capping film.