公开(公告)号：US20230007959A1

公开(公告)日：2023-01-12

申请号：US17804102

申请日：2022-05-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinyeong JOE ,  Dongchan SUH ,  Sungkeun LIM ,  Seokhoon KIM ,  Pankwi PARK ,  Dongsuk SHIN

IPC: H01L29/786 ,  H01L29/78 ,  H01L29/423 ,  H01L29/66 ,  H01L29/06

Abstract: A semiconductor device includes a first active region, a second active region spaced apart from the first active region, a plurality of first channel layers disposed on the first active region, and a second channel layer disposed on the second active region. The semiconductor device further includes a first gate structure intersecting the first active region and the first channel layers, a second gate structure intersecting the second active region and the second channel layer, a first source/drain region disposed on the first active region and contacting the plurality of first channel layers, and a second source/drain region and contacting the second channel layer. The plurality of first channel layers includes a first uppermost channel layer and first lower channel layers disposed below the first uppermost channel layer, and the first uppermost channel layer includes a material that is different from a material included in the first lower channel layers.

公开(公告)号：US20170092767A1

公开(公告)日：2017-03-30

申请号：US15379190

申请日：2016-12-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keum Seok PARK ,  Jungho YOO ,  Jinyeong JOE ,  Bonyoung KOO ,  Dongsuk SHIN ,  Hongsik YOON ,  Byeongchan LEE

IPC: H01L29/78 ,  H01L29/06 ,  H01L21/02 ,  H01L29/08 ,  H01L29/66 ,  H01L29/165 ,  H01L29/45

CPC classification number: H01L29/7848 ,  H01L21/02532 ,  H01L21/02636 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/45 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A semiconductor device includes an active pattern protruding from a substrate, a gate structure crossing over the active pattern, and source/drain regions disposed on the active pattern at opposite sides of the gate structure. Each of the source/drain regions includes a first epitaxial pattern contacting the active pattern and a second epitaxial pattern on the first epitaxial pattern. The first epitaxial pattern comprises a material having a lattice constant which is the same as that of the substrate, and the second epitaxial pattern comprises a material having a lattice constant greater than that of the first epitaxial pattern.

公开(公告)号：US20210408241A1

公开(公告)日：2021-12-30

申请号：US17471244

申请日：2021-09-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seojin JEONG ,  Jinyeong JOE ,  Seokhoon KIM ,  Jeongho YOO ,  Seung Hun LEE ,  Sihyung LEE

IPC: H01L29/16 ,  H01L29/10 ,  H01L29/04 ,  H01L29/167 ,  H01L29/36 ,  H01L27/092 ,  H01L29/06 ,  H01L21/8238 ,  H01L21/762 ,  H01L29/66 ,  H01L29/08

Abstract: A semiconductor device includes a substrate, a device isolation layer on the substrate, the device isolation layer defining a first active pattern, a pair of first source/drain patterns on the first active pattern, the pair of first source/drain patterns being spaced apart from each other in a first direction, and each of the pair of first source/drain patterns having a maximum first width in the first direction, a first channel pattern between the pair of first source/drain patterns, a gate electrode on the first channel pattern and extends in a second direction intersecting the first direction, and a first amorphous region in the first active pattern, the first amorphous region being below at least one of the pair of first source/drain patterns, and having a maximum second width in the first direction that is less than the maximum first width.

公开(公告)号：US20200075764A1

公开(公告)日：2020-03-05

申请号：US16412796

申请日：2019-05-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunguk JANG ,  Sujin JUNG ,  Jinyeong JOE ,  Jeongho YOO ,  Seung Hun LEE ,  Jongryeol YOO

IPC: H01L29/78 ,  H01L29/417 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10 ,  H01L27/088

Abstract: A semiconductor device includes a first active fin protruding from a substrate, a first gate pattern covering a side surface and a top surface of the first active fin, and first source/drain patterns at opposite sides of the first gate pattern, each of the first source/drain patterns including a first lower side and a second lower side spaced apart from each other, a first upper side extended from the first lower side, a second upper side extended from the second lower side. The first lower side may be inclined at a first angle relative to a top surface of the substrate, the second upper side may be inclined at a second angle relative to the top surface of the substrate, and the first angle may be greater than the second angle.