公开(公告)号：US20220319666A1

公开(公告)日：2022-10-06

申请号：US17599887

申请日：2021-04-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taehun KIM ,  Jidon YEO ,  Haanju YOO ,  Byeongchan LEE ,  Sangwoong LEE

IPC: G16H20/60

Abstract: A method, performed by an electronic device, of providing a plan, is provided. The method includes obtaining a plan including a plurality of items, predicting, for one or more points of time, a storage amount of a first ingredient to be consumed over time based on the plan, measuring the storage amount of the first ingredient at the one or more points of time, detecting a difference between the measured and predicted values at a first point of time from among the one or more points of time, and providing the plan by modifying the plan to reduce the difference after the first point of time, when the detected difference is greater than or equal to a reference value.

公开(公告)号：US20170092767A1

公开(公告)日：2017-03-30

申请号：US15379190

申请日：2016-12-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keum Seok PARK ,  Jungho YOO ,  Jinyeong JOE ,  Bonyoung KOO ,  Dongsuk SHIN ,  Hongsik YOON ,  Byeongchan LEE

IPC: H01L29/78 ,  H01L29/06 ,  H01L21/02 ,  H01L29/08 ,  H01L29/66 ,  H01L29/165 ,  H01L29/45

CPC classification number: H01L29/7848 ,  H01L21/02532 ,  H01L21/02636 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/45 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A semiconductor device includes an active pattern protruding from a substrate, a gate structure crossing over the active pattern, and source/drain regions disposed on the active pattern at opposite sides of the gate structure. Each of the source/drain regions includes a first epitaxial pattern contacting the active pattern and a second epitaxial pattern on the first epitaxial pattern. The first epitaxial pattern comprises a material having a lattice constant which is the same as that of the substrate, and the second epitaxial pattern comprises a material having a lattice constant greater than that of the first epitaxial pattern.

公开(公告)号：US20150214370A1

公开(公告)日：2015-07-30

申请号：US14491117

申请日：2014-09-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinbum KIM ,  Bonyoung KOO ,  Seokhoon KIM ,  Chul KIM ,  Kwan Heum LEE ,  Byeongchan LEE ,  Sujin JUNG

IPC: H01L29/78 ,  H01L29/08

CPC classification number: H01L29/0847 ,  H01L21/30608 ,  H01L21/3065 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device includes a substrate provided with an active pattern; a gate structure provided on the active pattern to cross the active pattern; and source/drain regions provided at both sides of the gate structure. The active pattern includes a first region below the gate structure and second regions at both sides of the gate structure. A top surface of each of the second regions is lower than that of the first region. The source/drain regions are provided on the second regions, respectively, and each of the source/drain regions covers partially both sidewalls of each of the second regions.

Abstract translation: 半导体器件包括具有活性图案的衬底; 栅极结构，设置在所述有源图案上以穿过所述有源图案; 以及设置在栅极结构的两侧的源极/漏极区域。 有源图案包括栅极结构下方的第一区域和栅极结构两侧的第二区域。 每个第二区域的顶表面低于第一区域的顶表面。 源极/漏极区域分别设置在第二区域上，并且每个源极/漏极区域部分地覆盖每个第二区域的两个侧壁。