公开(公告)号：US20220059530A1

公开(公告)日：2022-02-24

申请号：US17405606

申请日：2021-08-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong-Ho SONG ,  Jong Han LEE ,  Jong Ha PARK ,  Jae Hyun LEE ,  Jong Hoon BAEK ,  Da Bok JEONG

IPC: H01L27/088 ,  H01L21/8234

Abstract: A semiconductor device including a substrate including first and second regions along a first direction, and a third region between the first region and the second region, an active pattern extending in the first direction, on the substrate, and first to third gate electrodes spaced apart from each other and extending in a second direction, on the active pattern, the active pattern of the first region including first semiconductor patterns spaced apart from each other and penetrating the first gate electrode, the active pattern of the second region including second semiconductor patterns spaced apart from each other and penetrating the second gate electrode, the active pattern of the third region including a transition pattern protruding from the substrate and intersecting the third gate electrode and including a sacrificial pattern and a third semiconductor pattern alternately stacked on the third region and including different materials from each other.

公开(公告)号：US20240321876A1

公开(公告)日：2024-09-26

申请号：US18736793

申请日：2024-06-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong-Ho SONG ,  Jong Han LEE ,  Jong Ha PARK ,  Jae Hyun LEE ,  Jong Hoon BAEK ,  Da Bok JEONG

IPC: H01L27/088 ,  H01L21/8234

CPC classification number: H01L27/088 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823456 ,  H01L27/0886

Abstract: A semiconductor device including a substrate including first and second regions along a first direction, and a third region between the first region and the second region, an active pattern extending in the first direction, on the substrate, and first to third gate electrodes spaced apart from each other and extending in a second direction, on the active pattern, the active pattern of the first region including first semiconductor patterns spaced apart from each other and penetrating the first gate electrode, the active pattern of the second region including second semiconductor patterns spaced apart from each other and penetrating the second gate electrode, the active pattern of the third region including a transition pattern protruding from the substrate and intersecting the third gate electrode and including a sacrificial pattern and a third semiconductor pattern alternately stacked on the third region and including different materials from each other.

公开(公告)号：US20190305099A1

公开(公告)日：2019-10-03

申请号：US16178159

申请日：2018-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min Seok JO ,  Jae Hyun LEE ,  Jong Han LEE ,  Hong Bae PARK

IPC: H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L21/8234 ,  H01L21/762

Abstract: A semiconductor device includes a first fin type pattern and a second fin type pattern, which are isolated from each other by an isolating trench, and extend in a first direction on a substrate, respectively, a third fin type pattern which is spaced apart from the first fin type pattern and the second fin type pattern in a second direction and extends in the first direction, a field insulation film on a part of sidewalls of the first to third fin type patterns, a device isolation structure, which extends in the second direction, and is in the isolating trench, a gate insulation support, which extends in the first direction on the field insulation film between the first fin type pattern and the third fin type pattern, a gate structure, which intersects the third fin type pattern, extends in the second direction, and is in contact with the gate insulation support, wherein a height from the substrate to a bottom surface of the gate structure is greater than a height from the substrate to a bottom surface of the gate insulation support.