公开(公告)号：US20240107751A1

公开(公告)日：2024-03-28

申请号：US18352528

申请日：2023-07-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin A KIM ,  Kang-Uk KIM ,  Sang Hoon MIN ,  Choong Hyun LEE

IPC: H10B12/00

CPC classification number: H10B12/485 ,  H10B12/312 ,  H10B12/482 ,  H10B12/488

Abstract: A semiconductor memory device is provided. The semiconductor memory device comprises a substrate including a cell region having an active region defined by a cell element isolation layer, a peripheral region near the cell region, and a boundary region between the cell region and the peripheral region. The device includes a word line structure in the substrate and extending in a first direction, a bit line structure on the substrate extending from the cell region to the boundary region in a second direction that crosses the first direction, including first and second cell conductive layers sequentially stacked on the substrate, and a bit line contact between the substrate and the bit line structure and connecting the substrate with the bit line structure. The second cell conductive layer in the boundary region is thicker than the second cell conductive layer in the cell region.