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公开(公告)号:US20240019191A1
公开(公告)日:2024-01-18
申请号:US18206404
申请日:2023-06-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seungjun LEE , Hoyoon SONG , Sangyoul CHA
IPC: F25D21/00
CPC classification number: F25D21/006
Abstract: An electronic device includes: at least one memory configured to store information of a first neural network model trained to predict an operation of a refrigerator, and information of a second neural network model trained to obtain information associated with a defrosting of the refrigerator; and at least one processor configured to: obtain first data regarding an operation history of the refrigerator, input the first data to the first neural network model, and obtain, from the first neural network model, second data regarding a prediction result for a future operation of the refrigerator, and input the second data to the second neural network model, and obtain, from the second neural network model, third data including information regarding a degree of frost formation based on an operation of the refrigerator being performed according to the second data, and information regarding controlling a defrost operation of the refrigerator.
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2.
公开(公告)号:US20240011146A1
公开(公告)日:2024-01-11
申请号:US18328818
申请日:2023-06-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seungjun LEE , Nongmoon HWANG
IPC: C23C14/30 , H01J37/317 , C23C14/08 , C23C14/06 , C23C14/58
CPC classification number: C23C14/30 , H01J37/3178 , C23C14/083 , C23C14/0694 , C23C14/5806 , H01J2237/20214
Abstract: Provided herein are methods of forming a coating film that include providing a coating source including an orthorhombic vernier phase rare-earth element oxyfluoride and a part in a vacuum chamber, and performing a physical vapor deposition (PVD) process to form the coating film the part, wherein the coating film includes the orthorhombic vernier phase rare-earth element oxyfluoride. Apparatus including parts having coating films comprising an orthorhombic vernier phase rare-earth element oxyfluoride are also provided.
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3.
公开(公告)号:US20230176678A1
公开(公告)日:2023-06-08
申请号:US18091137
申请日:2022-12-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyunkeun SONG , Seungjun LEE
IPC: G06F3/041 , G06F3/01 , G06F3/04883
CPC classification number: G06F3/0416 , G06F3/017 , G06F3/04883
Abstract: An electronic device according to the disclosure may include: a display including a first area and a second area; a first sensor and a second sensor disposed oppositely on at least a part of or an adjacent side surface corresponding to the first area and the second area of the display, each of the first sensor and the second sensor configured to detect a grip; and a processor operatively connected to the display, the first sensor, and the second sensor, wherein the processor is configured to: detect a grip based on a sensor value change of one of the first sensor or the second sensor, receive a touch input sensed in at least a partial area of one of the first area or the second area of the display corresponding to the sensor among the first sensor or the second sensor detecting the grip, and convert into a touch input targeting an entire area of the display including the first area and the second area.
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公开(公告)号:US20230267071A1
公开(公告)日:2023-08-24
申请号:US18112244
申请日:2023-02-21
Applicant: SAMSUNG ELECTRONICS CO., LTD
Inventor: Bongjae JEONG , Minseok KANG , Seungjun LEE
IPC: G06F11/36
CPC classification number: G06F11/366
Abstract: An electronic device includes: a memory storing instructions; and a processor connected to the memory and configured to execute the instructions to: based on a software error occurring in the electronic device, determine whether attribute data set in relation to a memory margin of the electronic device corresponds to a specified value, based on determining that the attribute data corresponds to the specified value, identify a software error occurrence history stored in the memory, identify a defect associated with a memory margin configuration set for the memory based on the occurring software error and the software error occurrence history, and change the memory margin configuration by performing memory training on the memory based on the identification of the defect, wherein the memory margin includes information about a driving voltage and information about latency associated with data transmission.
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公开(公告)号:US20230215805A1
公开(公告)日:2023-07-06
申请号:US18114337
申请日:2023-02-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yewon SHIN , Jaesun YUN , Seungjun LEE , Jongmin LEE
IPC: H01L23/528 , H01L23/522 , H10B43/27 , H10B43/40
CPC classification number: H01L23/5283 , H01L23/5226 , H10B43/27 , H10B43/40
Abstract: A semiconductor device includes a stacked structure disposed on a substrate. The stacked structure includes a plurality of insulation layers and a plurality of electrode layers alternately stacked in a third direction intersecting with first and second directions. A plurality of channel structures extends through the stacked structure in the third direction. A first wiring group includes a plurality of first horizontal wirings disposed on the stacked structure that are arranged in the first direction and extends in the second direction. A second wiring group includes a plurality of second horizontal wirings disposed on the stacked structure that are arranged in the first direction and extends in the second direction. Each of the plurality of first and second horizontal wirings are connected to corresponding one of the plurality of channel structures. A first line identifier is disposed between the first wiring group and the second wiring group.
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公开(公告)号:US20230044853A1
公开(公告)日:2023-02-09
申请号:US17969239
申请日:2022-10-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jungwon PARK , Jongmin KANG , Daeyoung KIM , Sunghun KIM , Chijoon KIM , Hyosang AN , Seungjun LEE , Hyunggeun LEE , Seungwhee CHOI , Junyoung CHOI , Dooryong KIM , Yonghee JANG
Abstract: An electronic device is provided, which includes a first housing; a second housing; a hinge structure connecting the first housing and the second housing in a foldable manner; a flexible display including a first region corresponding to the first housing, a second region corresponding to the second housing, and a folding region corresponding to the hinge structure; a first protection cover disposed on the first housing to cover a periphery of the first region of the flexible display; a second protection cover disposed on the second housing to cover a periphery of the second region of the flexible display; and at least one protection structure.
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公开(公告)号:US20210366829A1
公开(公告)日:2021-11-25
申请号:US16950031
申请日:2020-11-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yewon SHIN , Jaesun YUN , Seungjun LEE , Jongmin LEE
IPC: H01L23/528 , H01L23/522 , H01L27/11582 , H01L27/11573
Abstract: A semiconductor device includes a stacked structure disposed on a substrate. The stacked structure includes a plurality of insulation layers and a plurality of electrode layers alternately stacked in a third direction intersecting with first and second directions. A plurality of channel structures extends through the stacked structure in the third direction. A first wiring group includes a plurality of first horizontal wirings disposed on the stacked structure that are arranged in the first direction and extends in the second direction. A second wiring group includes a plurality of second horizontal wirings disposed on the stacked structure that are arranged m the first direction and extends in the second direction. Each of the plurality of first and second horizontal wirings are connected to corresponding one of the plurality of channel structures. A first line identifier is disposed between the first wiring group and the second wiring group.
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公开(公告)号:US20240257896A1
公开(公告)日:2024-08-01
申请号:US18543687
申请日:2023-12-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seungki HONG , Seungjun LEE
CPC classification number: G11C29/44 , G11C29/18 , G11C2029/1802
Abstract: A repair circuit, including a first fail address latch configured to latch a first fail address and a second fail address corresponding to a first bank; a second fail address latch configured to latch a third fail address and a fourth fail address corresponding to a second bank different from the first bank; a fail address multiplexer configured merge the first fail address and the third fail address into a first merge address, and to merge the second fail address and the fourth fail address into a second merge address; a comparison circuit configured to compare the first and second merge addresses with merged decoded row addresses to generate first and second hit signals; a logic operator configured to output a valid hit pre-signal based on the first and second hit signals; and a valid hit latch configured output a valid hit signal based on the valid hit pre-signal.
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公开(公告)号:US20230183905A1
公开(公告)日:2023-06-15
申请号:US17961873
申请日:2022-10-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hoyoon SONG , Seho OH , Seungjun LEE
CPC classification number: D06F33/47 , D06F34/05 , D06F2103/16
Abstract: Disclosed is an electronic apparatus which includes a memory storing a first neural network model and a second neural network model; and a processor connected to the memory configured to control the electronic apparatus, and the processor may obtain context information of a user, operation information, and environment information of a washing machine, identify an active time and an inactive time of the user by inputting the context information into the first neural network model, obtain one or more freezing probabilities by time zones of the washing machine by inputting the operation information and the environment information into the second neural network model based on a current point in time being within the active time, and identify a freezing probability greater than or equal to a threshold freezing probability during the active time and the inactive time based on the obtained one or more freezing probabilities by time zones.
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10.
公开(公告)号:US20160062153A1
公开(公告)日:2016-03-03
申请号:US14810861
申请日:2015-07-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Myounghoon JUNG , Duhyun LEE , Byungkyu LEE , Yongjoo KWON , Yonghwa PARK , Seungjun LEE
CPC classification number: G02F1/01716 , G02F1/0121 , G02F2001/0155 , G02F2203/12
Abstract: Disclosed is a light modulating apparatus. The light modulating apparatus includes a pixel array including a plurality of pixels, a light modulating device that absorbs or transmit light incident on the pixel array according to an applied voltage, a flip-flop circuit that outputs a first voltage based on a device driving signal indicating a level of a second voltage applied to be applied to the light modulating device, and an amplifier that amplifies the first voltage to generate the second voltage and applies the second voltage to the light modulating device.
Abstract translation: 公开了一种光调制装置。 光调制装置包括:包括多个像素的像素阵列;根据施加电压吸收或透射入射在像素阵列上的光的光调制装置;基于装置驱动信号输出第一电压的触发电路; 指示施加到光调制装置的第二电压的电平;以及放大器,放大第一电压以产生第二电压,并将第二电压施加到光调制装置。
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