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    DATA TRANSMISSION METHOD FOR CONVOLUTION OPERATION, FETCHER, AND CONVOLUTION OPERATION APPARATUS
    1.
    发明申请
    DATA TRANSMISSION METHOD FOR CONVOLUTION OPERATION, FETCHER, AND CONVOLUTION OPERATION APPARATUS 有权

    公开(公告)号：US20220197834A1

    公开(公告)日：2022-06-23

    申请号：US17330229

    申请日：2021-05-25

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyunsun PARK ,  Jun-Woo JANG ,  Yoojin KIM ,  Channoh KIM

    IPC: G06F13/16

    Abstract: A data transmission method for a convolution operation, and a convolution operation apparatus including a fetcher that includes a loader, at least one sender, a buffer controller, and a reuse buffer. The method includes loading, by the loader, input data of an input feature map according to a loading order, based on input data stored in the reuse buffer, a shape of a kernel to be used for a convolution operation, and two-dimensional (2D) zero-value information of weights of the kernel; storing, by the buffer controller, the loaded input data in the reuse buffer of an address cyclically assigned according to the loading order; and selecting, by each of the at least one sender, input data corresponding to each output data of a convolution operation among the input data stored in the reuse buffer, based on one-dimensional (1D) zero-value information of the weights, and outputting the selected input data.

    METHOD AND APPARATUS OF OPERATING A NEURAL NETWORK
    4.
    发明申请
    METHOD AND APPARATUS OF OPERATING A NEURAL NETWORK 有权

    公开(公告)号：US20220253692A1

    公开(公告)日：2022-08-11

    申请号：US17400353

    申请日：2021-08-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyeongseok YU ,  Yoojin KIM ,  Seongwook PARK ,  Hyun Sun PARK ,  Sehwan LEE ,  Jun-Woo JANG ,  Deokjin JOO

    IPC: G06N3/08 ,  G06F9/30 ,  G06F7/02

    Abstract: Disclosed is a method and apparatus of operating a neural network. The neural network operation method includes receiving data for the neural network operation, verifying whether competition occurs between a first data traversal path corresponding to a first operation device and a second data traversal path corresponding to a second operation device, determining first operand data and second operand data from among the data using a result of the verifying and a priority between the first data traversal path and the second data traversal path, and performing the neural network operation based on the first operand data and the second operand data.

    METHOD AND APPARATUS FOR PROCESSING DATA
    5.
    发明申请
    METHOD AND APPARATUS FOR PROCESSING DATA 有权

    公开(公告)号：US20210174178A1

    公开(公告)日：2021-06-10

    申请号：US16896500

    申请日：2020-06-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyunsun PARK ,  Yoojin KIM ,  Junwoo JANG

    IPC: G06N3/063 ,  G06K9/62

    Abstract: A method of processing data includes manipulating input data based on a configuration of the input data and a configuration of hardware for processing the input data to generate manipulated data; rearranging the manipulated data based on sparsity of the manipulated data to generate rearranged data; and processing the rearranged data to generate output data.

    METHOD AND APPARATUS WITH NEURAL NETWORK OPERATION
    6.
    发明申请
    METHOD AND APPARATUS WITH NEURAL NETWORK OPERATION 有权

    公开(公告)号：US20230031471A1

    公开(公告)日：2023-02-02

    申请号：US17964446

    申请日：2022-10-12

    Applicant: Samsung Electronics Co., Ltd. ,  Seoul National University R&DB Foundation

    Inventor： Yoojin KIM ,  Soonhoi HA ,  Donghyun KANG ,  Jintaek KANG

    IPC: G06N3/08 ,  G06N3/04

    Abstract: A processor-implemented neural network method includes: generating a bit vector based on whether each of a plurality of input activations within a neural network is 0; merging the bit vector into the input activations such that bit values within the neural network included in the bit vector are most significant bits (MSBs) of multi bit expressions of the input activations; merging the bit vector into weights such that the bit values included in the bit vector are MSBs of multi bit expressions of the weights; sorting the input activations and the weights based on bits corresponding to the MSBs; and implementing the neural network, including performing operations between the sorted input activations and the sorted weights.

    MEMORY MAPPING METHOD AND APPARATUS
    7.
    发明申请
    MEMORY MAPPING METHOD AND APPARATUS 有权

    公开(公告)号：US20220269597A1

    公开(公告)日：2022-08-25

    申请号：US17353737

    申请日：2021-06-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Channoh KIM ,  Yoojin KIM

    IPC: G06F12/02 ,  G06F5/01 ,  G06N3/063

    Abstract: A memory mapping method includes storing a feature map including a plurality of sets of data used for a neural network operation in a memory, shifting a position of a portion of the data included in the feature map that is stored in the memory based on a parameter of the neural network operation, and outputting data requested by the neural network operation from the feature map in which the position of the portion is shifted based on a memory bandwidth.

    DEVICE AND METHOD WITH NEURAL NETWORK OPERATION
    8.
    发明申请
    DEVICE AND METHOD WITH NEURAL NETWORK OPERATION 有权

    公开(公告)号：US20220164674A1

    公开(公告)日：2022-05-26

    申请号：US17523129

    申请日：2021-11-10

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jun-Woo JANG ,  Yoojin KIM ,  Channoh KIM ,  Hyun Sun PARK

    IPC: G06N3/10 ,  G06F17/15

    Abstract: A neural network device includes: a memory configured to store a first feature map and a second feature map; and a neural network processor configured to operate a neural network, and comprising: a fetcher configured to fetch input data from the first feature map of the memory; a buffer configured to store the input data; an operator configured to generate output data by performing a convolution operation between the input data and a kernel; a writer configured to write the output data in the second feature map of the memory; and a controller configured to control the fetcher to fetch the input data and control the writer to write the output data, according to one or more intervals and one or more offsets determined based on a dilation rate of the kernel in multiple steps.

    ELECTRONIC DEVICE HAVING HOUSING
    9.
    发明申请
    ELECTRONIC DEVICE HAVING HOUSING 审中-公开

    公开(公告)号：US20200221589A1

    公开(公告)日：2020-07-09

    申请号：US16734032

    申请日：2020-01-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Soonho HAN ,  Yoojin KIM ,  Hyunggon LEE ,  Jongchul CHOI

    IPC: H05K5/00 ,  H05K5/02

    Abstract: An electronic device includes a housing including a first plate, a second plate facing away from the first plate, and a lateral member surrounding a space between the first plate and the second plate; a display visible through at least part of the first plate; and a glass construction constructing at least part of the second plate. The glass construction includes a glass plate including a first face outwardly facing the housing and a second face facing away from the first face, an inorganic layer including a first roughness and constructed on the first face, a first polymer layer disposed between the first plate and the second face, an Optically Clear Adhesive (OCA) layer disposed between the second face and the first polymer layer, and a second polymer layer disposed between the first plate and the first polymer layer and including a third face and a fourth face.

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