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    METHOD AND DEVICE WITH NEURAL NETWORK IMPLEMENTATION
    1.
    发明申请
    METHOD AND DEVICE WITH NEURAL NETWORK IMPLEMENTATION 有权

    公开(公告)号：US20210174177A1

    公开(公告)日：2021-06-10

    申请号：US16893560

    申请日：2020-06-05

    Applicant: Samsung Electronics Co., Ltd. ,  UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

    Inventor： Hyeongseok YU ,  Hyeonuk SIM ,  Jongeun LEE

    IPC: G06N3/063 ,  G06N3/04

    Abstract: A neural network device includes: an on-chip buffer memory that stores an input feature map of a first layer of a neural network, a computational circuit that receives the input feature map of the first layer through a single port of the on-chip buffer memory and performs a neural network operation on the input feature map of the first layer to output an output feature map of the first layer corresponding to the input feature map of the first layer, and a controller that transmits the output feature map of the first layer to the on-chip buffer memory through the single port to store the output feature map of the first layer and the input feature map of the first layer together in the on-chip buffer memory.

    METHOD AND APPARATUS OF OPERATING A NEURAL NETWORK
    2.
    发明申请
    METHOD AND APPARATUS OF OPERATING A NEURAL NETWORK 有权

    公开(公告)号：US20220253692A1

    公开(公告)日：2022-08-11

    申请号：US17400353

    申请日：2021-08-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyeongseok YU ,  Yoojin KIM ,  Seongwook PARK ,  Hyun Sun PARK ,  Sehwan LEE ,  Jun-Woo JANG ,  Deokjin JOO

    IPC: G06N3/08 ,  G06F9/30 ,  G06F7/02

    Abstract: Disclosed is a method and apparatus of operating a neural network. The neural network operation method includes receiving data for the neural network operation, verifying whether competition occurs between a first data traversal path corresponding to a first operation device and a second data traversal path corresponding to a second operation device, determining first operand data and second operand data from among the data using a result of the verifying and a priority between the first data traversal path and the second data traversal path, and performing the neural network operation based on the first operand data and the second operand data.

    METHOD AND DEVICE WITH NEURAL NETWORK IMPLEMENTATION
    4.
    发明公开
    METHOD AND DEVICE WITH NEURAL NETWORK IMPLEMENTATION 审中-公开

    公开(公告)号：US20240046082A1

    公开(公告)日：2024-02-08

    申请号：US18489209

    申请日：2023-10-18

    Applicant: Samsung Electronics Co., Ltd. ,  UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

    Inventor： Hyeongseok YU ,  Hyeonuk SIM ,  Jongeun LEE

    IPC: G06N3/063 ,  G06N3/04

    CPC classification number: G06N3/063 ,  G06N3/04

    Abstract: A neural network device including an on-chip buffer memory that stores an input feature map of a first layer of a neural network, a computational circuit that receives the input feature map of the first layer through a single port of the on-chip buffer memory and performs a neural network operation on the input feature map of the first layer to output an output feature map of the first layer corresponding to the input feature map of the first layer, and a controller that transmits the output feature map of the first layer to the on-chip buffer memory through the single port to store the output feature map of the first layer and the input feature map of the first layer together in the on-chip buffer memory.

    APPARATUS AND METHOD WITH MULTI-FORMAT DATA SUPPORT
    7.
    发明申请
    APPARATUS AND METHOD WITH MULTI-FORMAT DATA SUPPORT 有权

    公开(公告)号：US20230065528A1

    公开(公告)日：2023-03-02

    申请号：US17883987

    申请日：2022-08-09

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyeongseok YU ,  Donghyuk KWON ,  Channoh KIM ,  Seongwook PARK ,  Yeongon CHO

    IPC: G06F7/491 ,  G06F7/48

    Abstract: An apparatus with multi-format data support includes: a receiver configured to receive a plurality of data corresponding to a plurality of data formats; one or more processors configured to: multiply the plurality of data using one or more multipliers; perform a first alignment on a result of the multiplication based on an exponent value of the plurality of data; add a result of the first alignment; and perform a second alignment on a result of the addition based on the exponent value and an operation result of a previous cycle.

    METHOD AND PROCESSING APPARATUS FOR PERFORMING ARITHMETIC OPERATION
    8.
    发明申请
    METHOD AND PROCESSING APPARATUS FOR PERFORMING ARITHMETIC OPERATION 审中-公开

    公开(公告)号：US20170083287A1

    公开(公告)日：2017-03-23

    申请号：US15076084

    申请日：2016-03-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyeongseok YU

    IPC: G06F7/548 ,  G06F7/556 ,  G06F7/552

    CPC classification number: G06F7/548 ,  G06F7/544 ,  G06F7/552 ,  G06F7/556

    Abstract: A method of performing an arithmetic operation by a processing apparatus includes determining a polynomial expression approximating an arithmetic operation to be performed on a variable; adaptively determining upper bits for addressing a look-up table (LUT) according to a variable section to which the variable belongs; obtaining coefficients of the polynomial expression from the LUT by addressing the LUT using a value of the upper bits; and performing the arithmetic operation by calculating a result value of the polynomial expression using the coefficients.

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