公开(公告)号：US20250142823A1

公开(公告)日：2025-05-01

申请号：US18755840

申请日：2024-06-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Geunwon Lim ,  Youngho Kwon ,  Chungjin Kim ,  Jungho Lee ,  Yunkyu Jung

IPC: H10B43/27 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40

Abstract: A semiconductor device may include a plate layer, gate electrodes spaced apart from each other in a first direction perpendicular to an upper surface of the plate layer on the plate layer, extending to different lengths in a second direction perpendicular to the first direction and forming step regions, channel structures penetrating through the gate electrodes, extending in the first direction, and each including a channel layer, isolation regions penetrating through the gate electrodes and extending in the first direction and the second direction, sacrificial insulating layers on the same levels as levels of the gate electrodes, respectively, a through-via penetrating through the sacrificial insulating layers and extending in the first direction, a dam structure surrounding the through-via, and a guard structure spaced apart from the dam structure horizontally and having a closed loop shape surrounding the dam structure on a plan view.

公开(公告)号：US20240164091A1

公开(公告)日：2024-05-16

申请号：US18322842

申请日：2023-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Choasub Kim ,  Chung Jin Kim ,  Hyungang Kim ,  Soyeon Seok ,  Jungho Lee ,  Yunkyu Jung

IPC: H10B41/27 ,  H01L23/528 ,  H01L25/065 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B80/00

CPC classification number: H10B41/27 ,  H01L23/5283 ,  H01L25/0652 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B80/00 ,  H01L2225/06506 ,  H01L2225/06524

Abstract: Disclosed are semiconductor devices, electronic systems including the same, and methods of fabricating the same. The semiconductor device comprises a source structure that includes a support source layer, a gate stack structure on the support source layer, a memory channel structure that penetrates through the gate stack structure and the support source layer, and a separation structure that penetrates through the gate stack structure and the support source layer. The support source layer includes a first source part through which the memory channel structure penetrates, and a second source part through which the separation structure penetrates. A top surface of the first source part is at a level lower than that of a top surface of the second source part.