公开(公告)号：US20130323912A1

公开(公告)日：2013-12-05

申请号：US13950957

申请日：2013-07-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tomoko TAMURA ,  Eiji SUGIYAMA ,  Yoshitaka DOZEN ,  Koji DAIRIKI ,  Takuya TSURUME

IPC: H01L21/02

CPC classification number: H01L21/02381 ,  H01L21/84 ,  H01L27/1214 ,  H01L27/1266 ,  H01L27/13 ,  H01L2221/68359 ,  H01L2221/68368 ,  H01L2224/81001

Abstract: A release layer formed over a substrate; at least one of thin film integrated circuits is formed over the release layer; a film is formed over each of the at least one of thin film integrated circuits; and the release layer is removed by using an etchant; thus, the at least one of thin film integrated circuits is peeled from the substrate. A semiconductor device is formed by sealing the peeled thin film integrated circuit by lamination or the like.

Abstract translation: 形成在衬底上的释放层; 在剥离层上形成薄膜集成电路中的至少一个; 在薄膜集成电路中的至少一个上形成膜; 并通过使用蚀刻剂除去释放层; 因此，薄膜集成电路中的至少一个从基板剥离。 半导体器件通过层压等密封剥离的薄膜集成电路而形成。