公开(公告)号：US11854990B2

公开(公告)日：2023-12-26

申请号：US17176299

申请日：2021-02-16

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsien-Pin Hu ,  Chen-Hua Yu ,  Ming-Fa Chen ,  Jing-Cheng Lin ,  Jiun Ren Lai ,  Yung-Chi Lin

IPC分类号： H01L23/538 ,  H01L21/56 ,  H01L21/683 ,  H01L23/14 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065

CPC分类号： H01L23/5389 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/147 ,  H01L23/3121 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/81 ,  H01L24/97 ,  H01L24/16 ,  H01L25/0652 ,  H01L2221/68345 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81001 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L2924/014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1517 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2224/97 ,  H01L2224/81 ,  H01L2224/07 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2224/73203 ,  H01L2924/181 ,  H01L2924/00012

摘要： A device includes an interposer, which includes a substrate having a top surface. An interconnect structure is formed over the top surface of the substrate, wherein the interconnect structure includes at least one dielectric layer, and metal features in the at least one dielectric layer. A plurality of through-substrate vias (TSVs) is in the substrate and electrically coupled to the interconnect structure. A first die is over and bonded onto the interposer. A second die is bonded onto the interposer, wherein the second die is under the interconnect structure.

公开(公告)号：US20180366450A1

公开(公告)日：2018-12-20

申请号：US15533866

申请日：2015-12-17

申请人： Nathan GARDNER ,  Fredrick A. KISH JR. ,  Miljenko MODRIC ,  Anusha POKHRIYAL ,  Daniel THOMPSON ,  Fariba DANESH

发明人： Nathan GARDNER ,  Fredrick A. KISH JR. ,  Miljenko MODRIC ,  Anusha POKHRIYAL ,  Daniel THOMPSON ,  Fariba DANESH

IPC分类号： H01L25/075 ,  H01L25/16 ,  H01L33/00 ,  H01L33/62 ,  H01L21/683

CPC分类号： H01L25/0753 ,  H01L21/6835 ,  H01L24/97 ,  H01L25/167 ,  H01L25/50 ,  H01L27/156 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/62 ,  H01L2221/68322 ,  H01L2221/68381 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/81 ,  H01L2224/81001 ,  H01L2224/95 ,  H01L2933/0066

摘要： A backplane optionally having stepped horizontal surfaces and optionally embedding metal interconnect structures is provided. First conductive bonding structures are formed on first stepped horizontal surfaces. First light emitting devices on a first transfer substrate are disposed on the first conductive bonding structures, and a first subset of the first light emitting devices is bonded to the first conductive bonding structures. Laser irradiation can be employed to selectively disconnect the first subset of the first light emitting devices from the first transfer substrate while a second subset of the first light emitting devices remains attached to the first transfer substrate. Additional devices on each additional transfer substrate can be bonded to additional conductive bonding structures on the backplane employing the same method provided that the additional devices are not present in positions that would overlap with pre-existing first light emitting devices or devices on the backplane at a bonding position.

公开(公告)号：US10014273B2

公开(公告)日：2018-07-03

申请号：US15215640

申请日：2016-07-21

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Thomas E. Lombardi ,  Donald Merte ,  Gregg B. Monjeau ,  David L. Questad ,  Son K. Tran

IPC分类号： B23K3/08 ,  H01L23/00 ,  H01L21/56 ,  B23K1/00 ,  H01L21/48 ,  H01L23/498 ,  B23K101/40

CPC分类号： H01L24/81 ,  B23K1/0016 ,  B23K3/087 ,  B23K2101/40 ,  H01L21/4846 ,  H01L21/565 ,  H01L21/566 ,  H01L21/568 ,  H01L23/49894 ,  H01L24/01 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81001 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  Y10T29/49117 ,  H01L2924/00

摘要： A fixture assembly and method of forming a chip assembly is provided. The fixture assembly includes a first plate having an opening sized to accommodate a chip mounted on a laminate. The fixture assembly further includes a second plate mated to the first plate by at least one mechanical fastening mechanism. The fixture assembly further includes a space defined by facing surfaces of the first plate and the second plate and confined by a raised stepped portion of at least one of the first plate and the second plate. The space is coincident with the opening. The space is sized and shaped such that the laminate is confined within the space and directly abuts the stepped portion and the facing surfaces of the first plate and the second plate to be confined in X, Y and Z directions.

公开(公告)号：US09997440B2

公开(公告)日：2018-06-12

申请号：US13864676

申请日：2013-04-17

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Wen-Chih Chiou ,  Weng-Jin Wu ,  Shau-Lin Shue

IPC分类号： H01L23/498 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L25/00 ,  H01L21/768

CPC分类号： H01L23/49811 ,  H01L21/561 ,  H01L21/6836 ,  H01L21/76898 ,  H01L24/81 ,  H01L24/94 ,  H01L25/50 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/81001 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00

摘要： A three-dimensional integrated circuit (3DIC) including a first substrate having a first surface and a second surface opposite to the first surface and a second substrate attached to the first surface of the first substrate. The 3DIC further includes an interconnect between attached to the first surface of the first substrate and the second substrate and a plurality of through vias formed in the first substrate and electrically coupled to the interconnect. The 3DIC further includes a protection layer over the second surface of the first substrate, wherein each of the plurality of through vias protrudes through the protection layer and a plurality of dies, each die of the plurality of dies attached to at least one through via of the plurality of through vias.

公开(公告)号：US09935030B2

公开(公告)日：2018-04-03

申请号：US15605027

申请日：2017-05-25

申请人： SII Semiconductor Corporation

发明人： Noriyuki Kimura

IPC分类号： H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H01L21/683 ,  H01L23/495 ,  H01L23/528 ,  H01L23/29 ,  H01L23/552 ,  H01L21/56

CPC分类号： H01L23/3135 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/293 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/528 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2221/68327 ,  H01L2221/68359 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2224/81 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/81444 ,  H01L2224/83 ,  H01L2224/83001 ,  H01L2224/83005 ,  H01L2224/85 ,  H01L2224/85001 ,  H01L2224/85005 ,  H01L2224/85444 ,  H01L2224/92247 ,  H01L2224/95001 ,  H01L2224/96 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599

摘要： A first resin encapsulated body and a second resin encapsulated body are stacked to form a resin-encapsulated semiconductor device. The first resin encapsulated body includes: a first semiconductor element; an external terminal; inner wiring; and a first resin for covering those components, at least a rear surface of the external terminal, a rear surface of the semiconductor element, and a surface of the inner wiring are exposed from the first resin. The second resin encapsulated body includes: a second semiconductor element having an electrode pad formed on a surface thereof; a second resin for covering the second semiconductor element; and a metal body connected to the electrode pad, and is partly exposed from the second resin. The inner wiring and the metal body are electrically connected to each other.

公开(公告)号：US09842825B2

公开(公告)日：2017-12-12

申请号：US14479044

申请日：2014-09-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Lin-Chih Huang ,  Hung-An Teng ,  Hsin-Yu Chen ,  Tsang-Jiuh Wu ,  Cheng-Chieh Hsieh

IPC分类号： H01L21/00 ,  H01L23/00 ,  H01L21/78 ,  H01L23/538 ,  H01L23/498 ,  H01L21/683 ,  H01L25/065 ,  H01L25/00 ,  H01L23/14 ,  H01L21/56 ,  H01L23/31

CPC分类号： H01L24/81 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/145 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/17 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/03 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05026 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05184 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05684 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/13111 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/81192 ,  H01L2224/92124 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2224/81805 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/81

摘要： Integrated circuit packages and methods of forming the same are provided. One or more redistribution layers are formed on a carrier. First connectors are formed on a first side of the RDLs. Dies are bonded to the first side of the RDLs using the first connectors. An encapsulant is formed on the first side of the RDLs around the dies. The carrier is de-bonded from the overlaying structure and second connectors are formed on a second side of the RDLs. The resulting structure in diced to form individual packages.

公开(公告)号：US20170221761A1

公开(公告)日：2017-08-03

申请号：US15488514

申请日：2017-04-16

申请人： Monolithic 3D Inc.

发明人： Zvi Or-Bach ,  Deepak C. Sekar ,  Brian Cronquist ,  Zeev Wurman

IPC分类号： H01L21/77 ,  H01L27/10 ,  H01L27/02 ,  H01L23/00 ,  H01L23/31 ,  H01L29/66 ,  H01L23/40

CPC分类号： H01L21/77 ,  B82Y10/00 ,  G11C16/0408 ,  G11C16/0483 ,  H01L21/6835 ,  H01L21/76254 ,  H01L21/84 ,  H01L23/3114 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/4012 ,  H01L23/5286 ,  H01L24/01 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L27/0207 ,  H01L27/0688 ,  H01L27/0694 ,  H01L27/088 ,  H01L27/092 ,  H01L27/10 ,  H01L27/1052 ,  H01L27/10802 ,  H01L27/10894 ,  H01L27/10897 ,  H01L27/1104 ,  H01L27/1108 ,  H01L27/1116 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11529 ,  H01L27/11551 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11578 ,  H01L27/11807 ,  H01L27/1203 ,  H01L27/2436 ,  H01L27/249 ,  H01L28/00 ,  H01L29/1033 ,  H01L29/66257 ,  H01L29/6659 ,  H01L29/66795 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7841 ,  H01L29/785 ,  H01L29/78696 ,  H01L29/7881 ,  H01L29/792 ,  H01L45/04 ,  H01L45/1226 ,  H01L45/146 ,  H01L2221/6835 ,  H01L2221/68381 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81001 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2924/014 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A 3D integrated circuit device, including: a first transistor; a second transistor; and a third transistor, where the third transistor is overlaying the second transistor and the third transistor is controlled by a third control line, where the second transistor is overlaying the first transistor and the second transistor is controlled by a second control line, where the first transistor is part of a control circuit controlling the second control line and the third control line, and where the second transistor and the third transistor are self-aligned.

公开(公告)号：US09576931B1

公开(公告)日：2017-02-21

申请号：US15047632

申请日：2016-02-19

申请人： INOTERA MEMORIES, INC.

发明人： Shing-Yih Shih

IPC分类号： B65D85/00 ,  H01L33/48 ,  H01L23/00 ,  H01L21/56 ,  H01L21/683 ,  H01L21/3105 ,  H01L21/78

CPC分类号： H01L24/96 ,  H01L21/31053 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/16 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2224/0231 ,  H01L2224/13024 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/81001 ,  H01L2224/81192 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/15174 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2224/13099

摘要： A method for fabricating a wafer level package is disclosed. A carrier is provided. A redistributed layer (RDL) layer is formed on the carrier. Semiconductor dies are mounted on the RDL layer. The semiconductor dies are molded with a molding compound, thereby forming a molded wafer. A grinding process is then performed to remove a central portion of the molding compound, thereby forming a recess and an outer peripheral ring portion surrounding the recess. The carrier is then removed to expose a lower surface of the RDL layer. Solder bumps or solder balls are formed on the lower surface of the RDL layer.

摘要翻译： 公开了一种制造晶片级封装的方法。 提供载体。 在载体上形成再分布层（RDL）层。 半导体管芯安装在RDL层上。 用模塑料模制半导体管芯，从而形成模制的晶片。 然后进行研磨处理以除去模制化合物的中心部分，从而形成凹部和围绕凹部的外周环部分。 然后移除载体以暴露RDL层的下表面。 在RDL层的下表面上形成焊锡凸块或焊球。

公开(公告)号：US20170025320A1

公开(公告)日：2017-01-26

申请号：US15289298

申请日：2016-10-10

申请人： SII Semiconductor Corporation

发明人： Noriyuki KIMURA

IPC分类号： H01L23/31 ,  H01L23/00 ,  H01L23/495 ,  H01L23/538 ,  H01L25/065 ,  H01L23/29

CPC分类号： H01L23/3135 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/293 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/528 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2221/68327 ,  H01L2221/68359 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2224/81 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/81444 ,  H01L2224/83 ,  H01L2224/83001 ,  H01L2224/83005 ,  H01L2224/85 ,  H01L2224/85001 ,  H01L2224/85005 ,  H01L2224/85444 ,  H01L2224/92247 ,  H01L2224/95001 ,  H01L2224/96 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599

摘要： A first resin encapsulated body (25) and a second resin encapsulated body (26) are stacked to form a resin-encapsulated semiconductor device. The first resin encapsulated body (25) includes: a first semiconductor element (2); an external terminal (5); inner wiring (4); and a first resin (6) for covering those components, at least a rear surface of the external terminal (5), a rear surface of the semiconductor element (2), and a surface of the inner wiring (4) are exposed from the first resin (6). The second resin encapsulated body (26) includes: a second semiconductor element (7) having an electrode pad formed on a surface thereof; a second resin (8) for covering the second semiconductor element; and a metal body connected to the electrode pad, and is partly exposed from the second resin. The inner wiring and the metal body are electrically connected to each other.

摘要翻译： 堆叠第一树脂封装体（25）和第二树脂封装体（26）以形成树脂封装的半导体器件。 第一树脂封装体（25）包括：第一半导体元件（2）; 外部终端（5）; 内部接线（4）; 以及用于覆盖这些部件的第一树脂（6），至少外部端子（5）的后表面，半导体元件（2）的后表面和内部布线（4）的表面从 第一树脂（6）。 第二树脂封装体（26）包括：第二半导体元件（7），其表面上形成有电极焊盘; 用于覆盖第二半导体元件的第二树脂（8） 和连接到电极焊盘的金属体，并且部分地从第二树脂露出。 内部布线和金属体彼此电连接。

公开(公告)号：US20160329290A1

公开(公告)日：2016-11-10

申请号：US15212603

申请日：2016-07-18

申请人： Invensas Corporation

发明人： Belgacem Haba ,  Charles G. Woychik ,  Cyprian Emeka Uzoh ,  Michael Newman ,  Terrence Caskey

IPC分类号： H01L23/00

CPC分类号： H01L24/13 ,  H01L21/563 ,  H01L23/564 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05557 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/10145 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11903 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/13164 ,  H01L2224/1319 ,  H01L2224/14517 ,  H01L2224/1601 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16104 ,  H01L2224/16105 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16503 ,  H01L2224/17505 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81001 ,  H01L2224/81007 ,  H01L2224/811 ,  H01L2224/81139 ,  H01L2224/8192 ,  H01L2224/83104 ,  H01L2224/9201 ,  H01L2224/9212 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2924/00014 ,  H05K1/181 ,  H05K3/30 ,  Y10T29/4913 ,  H01L2924/00012 ,  H01L2924/01015 ,  H01L2924/01074 ,  H01L2224/05552

摘要： Microelectronic assemblies and methods for making the same are disclosed herein. In one embodiment, a method of forming a microelectronic assembly comprises assembling first and second components to have first major surfaces of the first and second components facing one another and spaced apart from one another by a predetermined spacing, the first component having first and second oppositely-facing major surfaces, a first thickness extending in a first direction between the first and second major surfaces, and a plurality of first metal connection elements at the first major surface, the second component having a plurality of second metal connection elements at the first major surface of the second component; and plating a plurality of metal connector regions each connecting and extending continuously between a respective first connection element and a corresponding second connection element opposite the respective first connection element in the first direction.

摘要翻译： 本文公开了微电子组件及其制造方法。 在一个实施例中，形成微电子组件的方法包括组装第一和第二部件以使第一和第二部件的第一主表面彼此面对并且彼此隔开预定间隔，第一部件具有第一和第二相对 主表面，在第一和第二主表面之间沿第一方向延伸的第一厚度和在第一主表面处的多个第一金属连接元件，第二部件在第一主要部分具有多个第二金属连接元件 第二部件的表面; 以及电镀多个金属连接器区域，每个金属连接器区域在第一方向上在相应的第一连接元件和与相应的第一连接元件相对的相应的第二连接元件之间连续延伸。