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公开(公告)号：US08781426B2
公开(公告)日：2014-07-15
申请号：US11560802
申请日：2006-11-16
申请人： Steven C. Ciccarelli , Brian Banister , Brian George , Soon-Seng Lau , Prasad Gudem , Arun Raghupathy
发明人： Steven C. Ciccarelli , Brian Banister , Brian George , Soon-Seng Lau , Prasad Gudem , Arun Raghupathy
IPC分类号： H04B1/06
CPC分类号： H04B1/109
摘要： Techniques for controlling operation of control loops in a receiver are described. The operation of at least one control loop is modified in conjunction with a change in operating state, which may correspond to a change in linearity state, gain state, operating frequency, antenna configuration, etc. A change in linearity state may occur when jammers are detected and may cause bias current of analog circuit blocks to be adjusted. The at least one control loop to be modified may include a DC loop, an AGC loop, etc. The operation of a control loop may be modified by disabling the control loop or changing its time constant prior to changing operating state, waiting a predetermined amount of time to allow the receiver to settle, and enabling the control loop or restoring its time constant after waiting the predetermined amount of time.
摘要翻译： 描述了用于控制接收机中的控制环路的操作的技术。 结合操作状态的改变来修改至少一个控制回路的操作，其可以对应于线性状态，增益状态，操作频率，天线配置等的改变。线性状态的变化可能发生在干扰器 并且可能导致模拟电路块的偏置电流被调整。 要修改的至少一个控制环路可以包括DC环路，AGC环路等。可以通过在改变操作状态之前禁用控制环路或改变其时间常数来修改控制环路的操作，等待预定量 的时间以允许接收机安定，并且在等待预定时间量之后启用控制环路或恢复其时间常数。
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公开(公告)号：US20080039042A1
公开(公告)日：2008-02-14
申请号：US11560802
申请日：2006-11-16
申请人： Steven Ciccarelli , Brian Banister , Brian George , Soon-Seng Lau , Prasad Gudem , Arun Raghupathy
发明人： Steven Ciccarelli , Brian Banister , Brian George , Soon-Seng Lau , Prasad Gudem , Arun Raghupathy
IPC分类号： H04B7/00
CPC分类号： H04B1/109
摘要： Techniques for controlling operation of control loops in a receiver are described. The operation of at least one control loop is modified in conjunction with a change in operating state, which may correspond to a change in linearity state, gain state, operating frequency, antenna configuration, etc. A change in linearity state may occur when jammers are detected and may cause bias current of analog circuit blocks to be adjusted. The at least one control loop to be modified may include a DC loop, an AGC loop, etc. The operation of a control loop may be modified by disabling the control loop or changing its time constant prior to changing operating state, waiting a predetermined amount of time to allow the receiver to settle, and enabling the control loop or restoring its time constant after waiting the predetermined amount of time.
摘要翻译： 描述了用于控制接收机中的控制环路的操作的技术。 结合操作状态的改变来修改至少一个控制回路的操作，其可以对应于线性状态，增益状态，操作频率，天线配置等的改变。线性状态的变化可能发生在干扰器 并且可能导致模拟电路块的偏置电流被调整。 要修改的至少一个控制环路可以包括DC环路，AGC环路等。可以通过在改变操作状态之前禁用控制环路或改变其时间常数来修改控制环路的操作，等待预定量 的时间以允许接收机安定，并且在等待预定时间量之后启用控制环路或恢复其时间常数。
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公开(公告)号：US20070262817A1
公开(公告)日：2007-11-15
申请号：US11560790
申请日：2006-11-16
IPC分类号： H03G3/00
CPC分类号： H04B1/109 , H03F3/72 , H03F2200/294 , H03F2203/7231 , H04K3/224 , H04W52/0238 , Y02D70/1222 , Y02D70/40
摘要： Techniques for operating a receiver to linearity performance and higher receive signal to noise ratio are described. The receiver includes one or more circuit blocks, e.g., a low noise amplifier (LNA), having discrete gain states. The gain states are selected based on switch points, with each switch point indicating a specific received signal level at which to switch from one gain state to another gain state. The switch points may be dynamically selected based on channel conditions, which may be characterized by the presence or absence or strength or frequency of jammers. A first set of switch points may be selected when jammers are detected, and a second set of switch points may be selected when jammers are not detected. The gain states are selected in accordance with the set of switch points selected for use.
摘要翻译： 描述了用于操作接收机以获得线性性能和较高接收信噪比的技术。 接收机包括具有离散增益状态的一个或多个电路块，例如低噪声放大器（LNA）。 根据切换点选择增益状态，每个开关点指示从一个增益状态切换到另一增益状态的特定接收信号电平。 可以基于信道条件动态地选择切换点，其可以由干扰的存在或不存在或强度或频率来表征。 当检测到干扰时，可以选择第一组切换点，并且当没有检测到干扰时可以选择第二组切换点。 增益状态根据选择使用的开关点集合进行选择。
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公开(公告)号：US08521198B2
公开(公告)日：2013-08-27
申请号：US11560790
申请日：2006-11-16
IPC分类号： H04B15/00
CPC分类号： H04B1/109 , H03F3/72 , H03F2200/294 , H03F2203/7231 , H04K3/224 , H04W52/0238 , Y02D70/1222 , Y02D70/40
摘要： Techniques for operating a receiver to linearity performance and higher receive signal to noise ratio are described. The receiver includes one or more circuit blocks, e.g., a low noise amplifier (LNA), having discrete gain states. The gain states are selected based on switch points, with each switch point indicating a specific received signal level at which to switch from one gain state to another gain state. The switch points may be dynamically selected based on channel conditions, which may be characterized by the presence or absence or strength or frequency of jammers. A first set of switch points may be selected when jammers are detected, and a second set of switch points may be selected when jammers are not detected. The gain states are selected in accordance with the set of switch points selected for use.
摘要翻译： 描述了用于操作接收机以获得线性性能和较高接收信噪比的技术。 接收机包括具有离散增益状态的一个或多个电路块，例如低噪声放大器（LNA）。 根据切换点选择增益状态，每个开关点指示从一个增益状态切换到另一增益状态的特定接收信号电平。 可以基于信道条件动态地选择切换点，其可以由干扰的存在或不存在或强度或频率来表征。 当检测到干扰时，可以选择第一组切换点，并且当没有检测到干扰时可以选择第二组切换点。 增益状态根据选择使用的开关点集合进行选择。
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公开(公告)号：US07522016B2
公开(公告)日：2009-04-21
申请号：US11227632
申请日：2005-09-14
申请人： Stanley Slavko Toncich , Aracely Williams , Raymond C. Wallace , Soon-Seng Lau , Steven C. Ciccarelli
发明人： Stanley Slavko Toncich , Aracely Williams , Raymond C. Wallace , Soon-Seng Lau , Steven C. Ciccarelli
CPC分类号： H03H9/76 , H03H7/12 , H03H9/25 , H03H9/6409 , H03H9/725
摘要： A tunable SAW resonator circuit is disclosed. The tunable SAW resonator circuit includes a SAW resonator having a Q, a resistor coupled to the SAW resonator to reduce the Q, and a tuning component coupled to the SAW resonator to tune the SAW resonator. A method to tune the SAW resonator is also disclosed. The SAW resonator may be tuned by applying a control signal to the tuning component.
摘要翻译： 公开了一种可调谐SAW谐振电路。 可调谐SAW谐振器电路包括具有Q的SAW谐振器，耦合到SAW谐振器以降低Q的电阻器，以及耦合到SAW谐振器的调谐组件以调谐SAW谐振器。 还公开了一种调谐SAW谐振器的方法。 可以通过向调谐组件施加控制信号来调谐SAW谐振器。
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6.发明授权Dynamically changing a transmitter sampling frequency for a digital-to-analog converter (DAC) to reduce interference from DAC images 有权动态更改数模转换器（DAC）的发射机采样频率，以减少DAC图像的干扰公开(公告)号：US08824967B2
公开(公告)日：2014-09-02
申请号：US12823668
申请日：2010-06-25
申请人： Thomas D. Marra , Soon-Seng Lau , Inyup Kang , Arash Mirbagheri
发明人： Thomas D. Marra , Soon-Seng Lau , Inyup Kang , Arash Mirbagheri
CPC分类号： H04B1/525 , H03M1/661 , H04B1/0475
摘要： A method for interference reduction is described. The method is implemented in a wireless device. It is determined that a page is going to be received via a secondary receiver. It is also determined that a digital-to-analog converter (DAC) image from a transmitter will cause interference with the secondary receiver when the page is received. A sampling frequency of the DAC for the transmitter is changed so that there are not any DAC images from the transmitter that will cause interference with the secondary receiver.
摘要翻译： 描述了一种减少干扰的方法。 该方法在无线设备中实现。 确定将通过次级接收器接收页面。 还确定，当接收到页面时，来自发射器的数模转换器（DAC）图像将引起与次级接收机的干扰。 改变发射机的DAC的采样频率，使得没有来自发射机的任何DAC图像将导致与次要接收机的干扰。
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7.发明授权Apparatus and method for dynamic scaling of ADC sampling rate to avoid receiver interference 有权用于动态缩放ADC采样率的装置和方法，以避免接收机干扰公开(公告)号：US08300680B2
公开(公告)日：2012-10-30
申请号：US12615052
申请日：2009-11-09
摘要： A method and apparatus for avoiding receiver interference is described herein. One or more potential interferers are determined and the frequency associated with the interferers is also determined A desired sampling frequency for the receiver is calculated to avoid the potential interferers.
摘要翻译： 本文描述了一种避免接收机干扰的方法和装置。 确定一个或多个潜在干扰源并且还确定与干扰源相关联的频率。为了避免潜在的干扰源，计算接收机的期望采样频率。
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8.发明申请公开(公告)号：US20110292855A1
公开(公告)日：2011-12-01
申请号：US13118232
申请日：2011-05-27
申请人： Juhi Saha , Brett Walker , Chris Rosolowski , Soon-Seng Lau
发明人： Juhi Saha , Brett Walker , Chris Rosolowski , Soon-Seng Lau
IPC分类号： H04W52/02
CPC分类号： G06F1/04 , G06F1/3203
摘要： Circuitry configured for dynamically adjusting clock signal quality based on an operating mode for power savings is described. The circuitry includes clock generation circuitry. The circuitry also includes mode control circuitry. The mode control circuitry provides a drive signal based on an operating mode. The circuitry also includes clock buffer circuitry coupled to the clock generation circuitry and to the mode control circuitry. The clock buffer circuitry adjusts a clock signal quality based on the drive signal.
摘要翻译： 描述了基于用于功率节省的操作模式来动态地调整时钟信号质量的电路。 电路包括时钟发生电路。 电路还包括模式控制电路。 模式控制电路基于操作模式提供驱动信号。 电路还包括耦合到时钟产生电路和模式控制电路的时钟缓冲器电路。 时钟缓冲电路根据驱动信号调整时钟信号质量。
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9.发明申请公开(公告)号：US20110300914A1
公开(公告)日：2011-12-08
申请号：US12794239
申请日：2010-06-04
IPC分类号： H04B1/38
CPC分类号： H04B1/1027 , H03F1/02 , H03F3/24 , H04B1/525 , H04B2001/045 , H04W52/0245 , Y02D70/1242 , Y02D70/164 , Y02D70/40
摘要： Although the duplexer in a full-duplex transceiver circuit may only be guaranteed by the duplexer manufacturer to have a transmit band rejection from its TX port to its RX port of a certain amount, and may only be guaranteed to have a receive band rejection of another amount, the actual transmit band rejection and the actual receive band rejection of a particular instance of the duplexer may be better than specified. Rather than consuming excess power in the receiver and/or transmitter in order to meet performance requirements assuming the duplexer only performs as well as specified, the duplexer's in-circuit performance is measured as part of a transmitter-to-receiver isolation determination. Transmitter and/or receiver power settings are reduced where possible to take advantage of the measured better-than-specified in-circuit duplexer performance, while still meeting transceiver performance requirements. Power settings are not changed during normal transmit and receive mode operation.
摘要翻译： 虽然全双工收发器电路中的双工器可能只能由双工器制造商保证从其TX端口到其一定数量的RX端口的发射波段抑制，并且只能保证具有另一个的接收频带抑制 数量，双工器的特定实例的实际发射频带抑制和实际接收频带抑制可能优于指定的。 假设双工器仅执行指定，而不是在接收机和/或发射机中消耗多余的功率，以满足性能要求，则双工器的在线性能是作为发射机到接收机隔离确定的一部分进行测量的。 发射机和/或接收机功率设置在可能的情况下可以减少，以便在仍然满足收发器性能要求的同时利用测得的优于指定的在线双工器性能。 在正常的发送和接收模式操作期间，电源设置不会改变。
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10.发明申请DYNAMICALLY CHANGING A TRANSMITTER SAMPLING FREQUENCY FOR A DIGITAL-TO-ANALOG CONVERTER (DAC) TO REDUCE INTERFERENCE FROM DAC IMAGES 有权动态更改用于数字模拟转换器（DAC）的发射机采样频率，以减少DAC图像的干扰公开(公告)号：US20110044380A1
公开(公告)日：2011-02-24
申请号：US12823668
申请日：2010-06-25
申请人： Thomas D. Marra , Soon-Seng Lau , Inyup Kang , Arash Mirbagheri
发明人： Thomas D. Marra , Soon-Seng Lau , Inyup Kang , Arash Mirbagheri
IPC分类号： H04B15/00
CPC分类号： H04B1/525 , H03M1/661 , H04B1/0475
摘要： A method for interference reduction is described. The method is implemented in a wireless device. It is determined that a page is going to be received via a secondary receiver. It is also determined that a digital-to-analog converter (DAC) image from a transmitter will cause interference with the secondary receiver when the page is received. A sampling frequency of the DAC for the transmitter is changed so that there are not any DAC images from the transmitter that will cause interference with the secondary receiver.
摘要翻译： 描述了一种减少干扰的方法。 该方法在无线设备中实现。 确定将通过次级接收器接收页面。 还确定，当接收到页面时，来自发射器的数模转换器（DAC）图像将引起与次级接收机的干扰。 改变发射机的DAC的采样频率，使得没有来自发射机的任何DAC图像将导致与次要接收机的干扰。
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