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公开(公告)号：US10566991B2
公开(公告)日：2020-02-18
申请号：US16373614
申请日：2019-04-02
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Peng Cao , Amit Kumar Gupta
Abstract: A delta-sigma modulator architecture with idle tone suppression based on injecting an out-of-band signal includes: modulator input circuitry to provide a modulator input signal; modulator loop circuitry to quantize the modulator input signal to generate a modulator output signal at an oversampling frequency, and to provide a feedback signal. Digital filtering circuitry filters the modulator output signal to provide a digital output signal at a data rate frequency related to the oversampling frequency by a defined oversampling ratio. Out-of-band (OoB) signal generator circuitry injects a deterministic OoB injection signal at a defined OoB frequency outside of a target frequency band. The modulator input circuitry combines the analog input signal, the feedback signal, and the OoB injection signal into the modulator input signal. The digital filtering circuitry filters the OoB injection signal. The OoB injection signal can be selectively defined to suppress idle tones generated in the modulator loop circuitry.
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公开(公告)号：US12231142B2
公开(公告)日：2025-02-18
申请号：US17874750
申请日：2022-07-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Amit Kumar Gupta
Abstract: An ADC includes a comparator to provide a comparator output responsive to an input voltage of the ADC and a DAC output voltage; a SAR circuit including a SAR that stores an n-bit digital code that is initialized at a beginning of a conversion phase of the ADC, where the SAR circuit is to update the digital code responsive to the comparator output, where an ADC output is responsive to the digital code at an end of the conversion phase; and a DAC to provide the DAC output voltage responsive to the digital code and a reference voltage. The DAC includes an m-bit CDAC and an (n−m)-bit RDAC to provide an intermediate voltage responsive to the n−m least-significant bits of the digital code and the reference voltage. The CDAC provides the DAC output voltage responsive to the m most-significant bits of the digital code, the intermediate voltage, and reference voltage.
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公开(公告)号：US20190305794A1
公开(公告)日：2019-10-03
申请号：US16373614
申请日：2019-04-02
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Peng Cao , Amit Kumar Gupta
IPC: H03M3/00
Abstract: A delta-sigma modulator architecture with idle tone suppression based on injecting an out-of-band signal includes: modulator input circuitry to provide a modulator input signal; modulator loop circuitry to quantize the modulator input signal to generate a modulator output signal at an oversampling frequency, and to provide a feedback signal. Digital filtering circuitry filters the modulator output signal to provide a digital output signal at a data rate frequency related to the oversampling frequency by a defined oversampling ratio. Out-of-band (OoB) signal generator circuitry injects a deterministic OoB injection signal at a defined OoB frequency outside of a target frequency band. The modulator input circuitry combines the analog input signal, the feedback signal, and the OoB injection signal into the modulator input signal. The digital filtering circuitry filters the OoB injection signal. The OoB injection signal can be selectively defined to suppress idle tones generated in the modulator loop circuitry.
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公开(公告)号：US10284222B1
公开(公告)日：2019-05-07
申请号：US16121906
申请日：2018-09-05
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Amit Kumar Gupta , Peng Cao
IPC: H03M3/00
Abstract: An analog-to-digital converter (ADC) device includes a delta-sigma modulator having at least one integrator and a quantizer configured to receive an output of the at least one integrator. The delta-sigma modulator also includes digital-to-analog converter (DAC) capacitor bank, a sampling capacitor bank, and a pre-charge capacitor bank, each selectively coupled to an input node of the at least one integrator. The delta-sigma modulator also includes a pre-charge signal generator coupled to the pre-charge capacitor bank. The pre-charge signal generator is configured to generate a pre-charge signal to charge the pre-charge capacitor bank based at least in part on an output code of the quantizer.
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公开(公告)号：US20170194983A1
公开(公告)日：2017-07-06
申请号：US15463780
申请日：2017-03-20
Applicant: Texas Instruments Incorporated
Inventor： Peng Cao , Amit Kumar Gupta , Venkata Krishnan Kidambi Srinivasan
IPC: H03M3/00
Abstract: A dual delta-sigma modulator includes a first modulator, a second modulator, and a shared amplifier coupled to the first and second modulators. The first modulator includes an integrator configured to generate a first modulator output signal. The second modulator includes a second integrator configured to generate a second modulator output signal. The shared amplifier is configured to assist the first integrator integrating a difference between a first analog input signal and a first modulator output signal from the first modulator during a first period of time and to assist the second integrator integrate a difference between a second analog input signal and a second modulator output signal from the second modulator during a second period of time.
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Patent Agency Ranking
公开(公告)号：US09871494B2
公开(公告)日：2018-01-16
申请号：US15229756
申请日：2016-08-05
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Amit Kumar Gupta , Peng Cao
CPC classification number: H03F3/211 , H03F3/3022 , H03F3/45192 , H03F2203/45288
Abstract: An operational amplifier includes an output stage, an input stage, a first auxiliary amplifier, and a second auxiliary amplifier. The output stage includes a first output transistor and a second output transistor. The input stage is configured to drive the output stage. The first auxiliary amplifier is coupled to an output of the input stage and to an input of the first output transistor. The first auxiliary amplifier is configured to bias the first output transistor for class AB operation and to isolate the input stage from a bias voltage applied to the first output transistor. The second auxiliary amplifier is coupled to the output of the input stage and to an input of the second output transistor. The second auxiliary amplifier is configured to bias the second output transistor for class AB operation, and to isolate the input stage from a bias voltage applied to the second output transistor.
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7.发明申请AMPLIFIER SHARING TECHNIQUE FOR POWER REDUCTION IN ANALOG-TO-DIGITAL CONVERTER 有权用于模拟数字转换器中功率降低的放大器共享技术公开(公告)号：US20170041012A1
公开(公告)日：2017-02-09
申请号：US15231166
申请日：2016-08-08
Applicant: Texas Instruments Incorporated
Inventor： Peng Cao , Amit Kumar Gupta , Venkata Krishnan Kidambi Srinivasan
Abstract: A dual delta-sigma modulator includes a first modulator, a second modulator, and a shared amplifier coupled to the first and second modulators. The first modulator includes an integrator configured to generate a first modulator output signal. The second modulator includes a second integrator configured to generate a second modulator output signal. The shared amplifier is configured to assist the first integrator integrating a difference between a first analog input signal and a first modulator output signal from the first modulator during a first period of time and to assist the second integrator integrate a difference between a second analog input signal and a second modulator output signal from the second modulator during a second period of time.
Abstract translation: 双Δ-Δ调制器包括第一调制器，第二调制器和耦合到第一和第二调制器的共享放大器。 第一调制器包括被配置为产生第一调制器输出信号的积分器。 第二调制器包括被配置为产生第二调制器输出信号的第二积分器。 共享放大器被配置为辅助第一积分器在第一时间段期间积分第一模拟输入信号和来自第一调制器的第一调制器输出信号之间的差异，并且辅助第二积分器将第二模拟输入信号 以及在第二时间段期间来自第二调制器的第二调制器输出信号。
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公开(公告)号：US11264959B2
公开(公告)日：2022-03-01
申请号：US16903030
申请日：2020-06-16
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Amit Kumar Gupta , Peng Cao
Abstract: A precharge circuit comprises a gain amplifier, a comparator, a reservoir capacitor, a switch, a current source, and a switching network. The gain amplifier has a gain G1 and receives an input voltage Vrefp. The gain amplifier outputs an amplified voltage G1Vrefp to the comparator, which compares G1Vrefp to a voltage across the reservoir capacitor. The comparator outputs a control signal for the switch based on the comparison. The switch couples the current source to the reservoir capacitor. The current from the current source charges the reservoir capacitor. The switching network couples the reservoir capacitor to an output of the precharge circuit during a first operating mode and provides the input voltage Vrefp to the output during a second operating mode.
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公开(公告)号：US09893741B2
公开(公告)日：2018-02-13
申请号：US15463780
申请日：2017-03-20
Applicant: Texas Instruments Incorporated
Inventor： Peng Cao , Amit Kumar Gupta , Venkata Krishnan Kidambi Srinivasan
Abstract: A dual delta-sigma modulator includes a first modulator, a second modulator, and a shared amplifier coupled to the first and second modulators. The first modulator includes an integrator configured to generate a first modulator output signal. The second modulator includes a second integrator configured to generate a second modulator output signal. The shared amplifier is configured to assist the first integrator integrating a difference between a first analog input signal and a first modulator output signal from the first modulator during a first period of time and to assist the second integrator integrate a difference between a second analog input signal and a second modulator output signal from the second modulator during a second period of time.
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公开(公告)号：US09602118B2
公开(公告)日：2017-03-21
申请号：US15231166
申请日：2016-08-08
Applicant: Texas Instruments Incorporated
Inventor： Peng Cao , Amit Kumar Gupta , Venkata Krishnan Kidambi Srinivasan
Abstract: A dual delta-sigma modulator includes a first modulator, a second modulator, and a shared amplifier coupled to the first and second modulators. The first modulator includes an integrator configured to generate a first modulator output signal. The second modulator includes a second integrator configured to generate a second modulator output signal. The shared amplifier is configured to assist the first integrator integrating a difference between a first analog input signal and a first modulator output signal from the first modulator during a first period of time and to assist the second integrator integrate a difference between a second analog input signal and a second modulator output signal from the second modulator during a second period of time.
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