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公开(公告)号：US09893741B2
公开(公告)日：2018-02-13
申请号：US15463780
申请日：2017-03-20
摘要： A dual delta-sigma modulator includes a first modulator, a second modulator, and a shared amplifier coupled to the first and second modulators. The first modulator includes an integrator configured to generate a first modulator output signal. The second modulator includes a second integrator configured to generate a second modulator output signal. The shared amplifier is configured to assist the first integrator integrating a difference between a first analog input signal and a first modulator output signal from the first modulator during a first period of time and to assist the second integrator integrate a difference between a second analog input signal and a second modulator output signal from the second modulator during a second period of time.
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公开(公告)号：US09807504B2
公开(公告)日：2017-10-31
申请号：US15370576
申请日：2016-12-06
CPC分类号： H04R3/04 , H03G3/3005 , H03G3/3089 , H03M1/12 , H03M1/121 , H03M1/188 , H03M3/468 , H03M3/488
摘要： In accordance with embodiments of the present disclosure, a processing system comprising may include a plurality of processing paths and a filter. The plurality of processing paths may include a first processing path and a second processing path, wherein the first processing path is configured to generate a first digital signal based on an analog input signal and the second processing path is configured to generate a second digital signal based on the analog input signal. The filter may have a corner frequency and may be configured to generate a filtered digital output signal combining spectral components of the first digital signal lower than the corner frequency and spectral components of the second digital signal higher than the corner frequency to generate a filtered digital signal.
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公开(公告)号：US09641192B1
公开(公告)日：2017-05-02
申请号：US15181942
申请日：2016-06-14
发明人： Akinobu Onishi
IPC分类号： H03M3/00
CPC分类号： H03M3/368 , H03M3/30 , H03M3/422 , H03M3/45 , H03M3/464 , H03M3/468 , H04R3/06 , H04R19/005 , H04R19/04 , H04R2201/003
摘要： Various embodiments of the present technology may comprise a method and device for a delta-sigma ADC. The method and device may comprise receiving an input signal to at least two parallel-connected first-stage integrators and corresponding feedback DACs, and simultaneously integrating the input signal by each of the first-stage integrators. The method and device may further comprise a second stage integrator connected in series with the first-stage integrators, a quantizer, and digital to analog converters, coupled between the output of the quantizer and the inputs of the first-stage integrators.
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公开(公告)号：US09621175B2
公开(公告)日：2017-04-11
申请号：US15251689
申请日：2016-08-30
摘要： Provided are, among other things, systems, apparatuses, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. One such apparatus includes an input line for accepting an input signal that is continuous in time and continuously variable, multiple processing branches coupled to the input line, and an adder coupled to outputs of the processing branches, with each of the processing branches including a bandpass noise-shaping circuit, a sampling/quantization circuit coupled to an output of the bandpass noise-shaping circuit, a digital bandpass filter coupled to an output of the sampling/quantization circuit, and a line coupling an output of the sampling/quantization converter circuit back into the bandpass noise-shaping circuit. A center frequency of the digital bandpass filter in each processing branch corresponds to a stopband region in a quantization noise transfer function for the bandpass noise-shaping circuit in the same processing branch.
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公开(公告)号：US09602118B2
公开(公告)日：2017-03-21
申请号：US15231166
申请日：2016-08-08
摘要： A dual delta-sigma modulator includes a first modulator, a second modulator, and a shared amplifier coupled to the first and second modulators. The first modulator includes an integrator configured to generate a first modulator output signal. The second modulator includes a second integrator configured to generate a second modulator output signal. The shared amplifier is configured to assist the first integrator integrating a difference between a first analog input signal and a first modulator output signal from the first modulator during a first period of time and to assist the second integrator integrate a difference between a second analog input signal and a second modulator output signal from the second modulator during a second period of time.
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公开(公告)号：US09130584B1
公开(公告)日：2015-09-08
申请号：US14558640
申请日：2014-12-02
IPC分类号： H03M3/00
摘要： Provided are, among other things, systems, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. According to one implementation, an apparatus includes multiple processing branches, each including: a continuous-time quantization-noise-shaping circuit, a sampling/quantization circuit, and a digital bandpass filter. A combining circuit then combines signals at the processing branch outputs into a final output signal. The continuous-time quantization-noise-shaping circuits include adjustable circuit components for changing their quantization-noise frequency-response minimum, and the digital bandpass filters include adjustable parameters for changing their frequency passbands.
摘要翻译： 尤其提供了用于将连续时间连续可变信号转换为采样和量化信号的系统，方法和技术。 根据一个实现，一种装置包括多个处理分支，每个分支包括：连续时间量化噪声整形电路，采样/量化电路和数字带通滤波器。 然后，组合电路将处理分支输出处的信号组合成最终的输出信号。 连续时间量化噪声整形电路包括用于改变其量化噪声频率响应最小值的可调节电路部件，并且数字带通滤波器包括用于改变其频率通带的可调参数。
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7.发明授权Method for extending a frequency range of an input signal of a hearing device as well as a hearing device 有权用于扩展听力设备和听力设备的输入信号的频率范围的方法公开(公告)号：US09113271B2
公开(公告)日：2015-08-18
申请号：US14131760
申请日：2011-07-14
申请人： Hans-Ueli Roeck
发明人： Hans-Ueli Roeck
CPC分类号： H04R25/353 , H03M3/468 , H03M3/472 , H04R25/00 , H04R25/505 , H04R2225/43 , H04R2460/03
摘要： The present invention is directed to a method and a hearing device for extending a usable frequency range of an analog input signal (i) being processed by a hearing device, the method comprising the steps of converting the analog input signal (i) to a first output signal (o1) and to an intermediate signal (om), the first output signal (o1) having a final sampling rate and the intermediate signal (om) having an intermediate sampling rate that is greater than the final sampling rate, applying a band-pass filter unit (31) to the intermediate signal (om) in order to obtain a filtered intermediate signal (omf), a lower cut-off frequency of the band-pass filter unit (31) being above half the final sampling rate, an upper cut-off frequency of the band-pass filter unit (31) being below half the intermediate sampling rate, and shifting a spectrum of the filtered intermediate signal (omf) to a frequency range being below the final sampling rate to obtain an intermediate output signal (om2).
摘要翻译： 本发明涉及一种用于扩展由听力装置处理的模拟输入信号（i）的可用频率范围的方法和听力装置，所述方法包括以下步骤：将模拟输入信号（i）转换成第一 输出信号（o1）和中间信号（om），所述第一输出信号（o1）具有最终采样率，并且所述中间信号（om）具有大于所述最终采样速率的中间采样率， 通过滤波器单元（31）到中间信号（om）以获得滤波的中间信号（omf），带通滤波器单元（31）的下限截止频率高于最终采样率的一半， 带通滤波器单元（31）的上限截止频率低于中间采样率的一半，并且将滤波后的中间信号（omf）的频谱移动到低于最终采样率的频率范围，以获得中间 输出信号（om2）。
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公开(公告)号：US20120068867A1
公开(公告)日：2012-03-22
申请号：US13304588
申请日：2011-11-25
摘要： Provided are, among other things, systems, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. According to one representative embodiment, an apparatus includes multiple quantization-noise-shaping continuous-time filters, each in a separate processing branch and having an adder that includes multiple inputs and an output; an input signal is coupled to one of the inputs of the adder; the output of the adder is coupled to one of the inputs of the adder through a first filter; and the output of a sampling/quantization circuit in the same processing branch is coupled to one of the inputs of the adder through a second filter, with the second filter having a different transfer function than the first filter.
摘要翻译： 尤其提供了用于将连续时间连续可变信号转换为采样和量化信号的系统，方法和技术。 根据一个代表性实施例，一种装置包括多个量化噪声整形连续时间滤波器，每个滤波器在单独的处理分支中并具有包括多个输入和输出的加法器; 输入信号耦合到加法器的一个输入端; 加法器的输出通过第一滤波器耦合到加法器的一个输入端; 并且相同处理支路中的采样/量化电路的输出通过第二滤波器耦合到加法器的一个输入端，第二滤波器具有与第一滤波器不同的传递函数。
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公开(公告)号：US07336210B2
公开(公告)日：2008-02-26
申请号：US11285457
申请日：2005-11-22
申请人： Aurel A. Lazar
发明人： Aurel A. Lazar
IPC分类号： H03M1/00
摘要： Analog signals can be fully encoded as an asynchronous time sequence generated by a time encoding machine. With knowledge of the parameters of the time encoding machine, the asynchronous time sequence can be decoded using a non-linear time decoding machine. Such a system can be extended into an encoder/decoder in which a signal is processed in M separate channels. An input signal is applied to the encoder where the signal is provided to an M channel encoder circuit including a filter bank having a total bandwidth partitioned among M adjacent or overlapping filters. Each of the M filters are coupled to a corresponding one of M time encoding machines. The encoder output is represented by M sets of time encoded trigger values. The input signal can be recovered from the M sets of time encoded trigger values by applying the trigger signals to a corresponding M channel decoder which includes M TDMs and filters. The TDMs recover the continuous signal from each channel. The filter outputs xm are then amplitude scaled sm and are combined to recover the input signal. By partitioning the signal bandwidth into M channels, the average pulse rate from each TDM is substantially reduced.
摘要翻译： 模拟信号可以被完全编码为由时间编码机产生的异步时间序列。 利用时间编码机的参数知识，可以使用非线性时间解码机对异步时序进行解码。 这样的系统可以扩展到编码器/解码器，其中在M个独立的信道中处理信号。 输入信号被施加到编码器，其中信号被提供给M通道编码器电路，该M通道编码器电路包括具有在M个相邻或重叠滤波器之间划分的总带宽的滤波器组。 M个滤波器中的每一个耦合到M个时间编码机中相应的一个。 编码器输出由M组时间编码的触发值表示。 可以通过将触发信号施加到包括M个TDM和滤波器的相应M信道解码器，从M组的时间编码触发值中恢复输入信号。 TDM从每个通道恢复连续信号。 滤波器输出xm然后是幅度缩放的sm并被组合以恢复输入信号。 通过将信号带宽划分为M个信道，来自每个TDM的平均脉冲速率显着降低。
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公开(公告)号：US20060261986A1
公开(公告)日：2006-11-23
申请号：US11285457
申请日：2005-11-22
申请人： Aurel Lazar
发明人： Aurel Lazar
IPC分类号： H03M7/00
摘要： Analog signals can be fully encoded as an asynchronous time sequence generated by a time encoding machine. With knowledge of the parameters of the time encoding machine, the asynchronous time sequence can be decoded using a non-linear time decoding machine. Such a system can be extended into an encoder/decoder in which a signal is processed in M separate channels. An input signal is applied to the encoder where the signal is provided to an M channel encoder circuit including a filter bank having a total bandwidth partitioned among M adjacent or overlapping filters. Each of the M filters are coupled to a corresponding one of M time encoding machines. The encoder output is represented by M sets of time encoded trigger values. The input signal can be recovered from the M sets of time encoded trigger values by applying the trigger signals to a corresponding M channel decoder which includes M TDMs and filters. The TDMs recover the continuous signal from each channel. The filter outputs xm are then amplitude scaled sm and are combined to recover the input signal. By partitioning the signal bandwidth into M channels, the average pulse rate from each TDM is substantially reduced.
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