Circuit and system for the reduction of voltage overshoot in power switches

    公开(公告)号:US12273097B2

    公开(公告)日:2025-04-08

    申请号:US18438707

    申请日:2024-02-12

    Abstract: An electronic circuit for controlling a power switch having a gate input, includes a signal generator configured to generate a gate driver input signal. The gate driver input signal has a first voltage during a first period of time, a second voltage during a second period of time, and toggles between the first voltage and the second voltage during a third period of time. The electronic circuit also includes a gate driver configured to receive the gate driver input signal and to provide a gate driver output signal based on the gate driver input signal. The signal generator is configured to cause the gate driver input signal to toggle during the third period of time such that the gate driver output signal has a third voltage during the second period of time, and an intermediate voltage that is less than the third voltage during the third period of time.

    Dead time adjusted pulse width modulator

    公开(公告)号:US12237763B2

    公开(公告)日:2025-02-25

    申请号:US18507613

    申请日:2023-11-13

    Abstract: A pulse width modulator circuit with circuitry for providing a first and second pulse width modulation signal with dead time periods between the first and second pulse width modulation signals, an input for receiving a signal representative of a current in a load adapted to be driven in response to the first and second pulse width modulation signals, and circuitry coupled to the input for adjusting the dead time periods in response to the signal representative of a current.

    Common wire full-wave rectifier circuit

    公开(公告)号:US12068698B2

    公开(公告)日:2024-08-20

    申请号:US17538544

    申请日:2021-11-30

    CPC classification number: H02M7/217 H02M1/08 F24F11/88 H02M3/00

    Abstract: In an example, a rectifier circuit includes first and second capacitors, first and second current control devices, and a switch. The first current control device is configured to provide an input current to the first capacitor during a positive cycle of an alternating current (AC) input voltage. The second capacitor is configured to store a charge and the switch is configured to couple the second capacitor to a ground terminal so the second capacitor discharges a capacitor current during the positive cycle of the input voltage responsive to the stored charge in the second capacitor. The second current control device is configured to provide the capacitor current to the first capacitor during the positive cycle of the input voltage. The first capacitor is configured to store a charge responsive to the input current and the capacitor current.

    HARDWARE BASED MOTOR DRIVE CONTROLLER

    公开(公告)号:US20220209695A1

    公开(公告)日:2022-06-30

    申请号:US17137598

    申请日:2020-12-30

    Abstract: A motor system with an input for coupling to a motor control signal that, when presented in a predetermined state, indicates a motor receiving power should be disabled from rotating. The system also includes controller circuitry for providing a disabling signal to motor rotation, independent of processor software control signaling and the power, in response to the control signal.

    Solid-state relay with isolator
    10.
    发明授权

    公开(公告)号:US11271562B2

    公开(公告)日:2022-03-08

    申请号:US17072289

    申请日:2020-10-16

    Abstract: A solid-state relay circuit includes an isolator circuit, a first output terminal, a second output terminal, and an output switch. The output switch is coupled to the isolator circuit, and includes a first transistor, a second transistor, and a diode. The first transistor is coupled to the first output terminal. The second transistor is coupled to the first transistor and the second output terminal. The diode is coupled to the first transistor, the second transistor, and ground, and is configured to block current flow from ground to the first transistor and the second transistor. The isolator circuit is coupled to the output switch and is configured to activate the first transistor and the second transistor.

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