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    Smart Scan Options to Improve Wafer Die Yield
    1.
    发明公开
    Smart Scan Options to Improve Wafer Die Yield 审中-公开

    公开(公告)号：US20240143890A1

    公开(公告)日：2024-05-02

    申请号：US18050151

    申请日：2022-10-27

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Rakul VISWANATH ,  Sachin AITHAL ,  Gunvarun SUDAN

    IPC: G06F30/394 ,  G06F30/347

    CPC classification number: G06F30/394 ,  G06F30/347

    Abstract: A circuit includes: channel signal chains; configuration registers including a configuration register for each of the channel signal chains; channel data registers including a channel data register for each of the channel signal chains; a first communication interface coupled to the configuration registers via a daisy-chain connection; a second communication interface coupled to the set of channel data registers via respective parallel connections; and routing interfaces including a routing interface for each of the channel signal chains, each of the routing interfaces having a routing data input, a daisy-chain connection input, a parallel connection input, first and second control inputs, and a routing data output.

    HYBRID LEAKAGE-COMPENSATION SCHEME FOR IMPROVED CORRECTION RANGE
    2.
    发明申请
    HYBRID LEAKAGE-COMPENSATION SCHEME FOR IMPROVED CORRECTION RANGE 有权

    公开(公告)号：US20210310863A1

    公开(公告)日：2021-10-07

    申请号：US17348976

    申请日：2021-06-16

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Rakul VISWANATH ,  Nagesh SURENDRANATH ,  Sandeep Kesrimal OSWAL ,  Ratna Kumar Venkata PARUPUDI

    IPC: G01J1/44

    Abstract: A dark current compensation circuit comprises a first comparator having inputs for a detection signal and a first voltage, and a second comparator having inputs for the detection signal and a second voltage. The dark current compensation circuit also comprises a controller coupled to the first and second comparators, which has an input for an event signal. An adjustable current source is coupled to the controller and configured to generate a compensation current. The controller adjusts a value of the compensation current based on the first and second comparator outputs and maintains a constant value in response to the event signal indicating photons incident on a photon detector. In some implementations, the dark current compensation circuit further comprises an analog sub-circuit coupled to the adjustable current source and configured to receive the detection signal. The analog sub-circuit generates an analog compensation current in response to the detection signal.

    PHOTON COUNTING ANALOG FRONT END WITH LOAD BALANCING
    3.
    发明申请
    PHOTON COUNTING ANALOG FRONT END WITH LOAD BALANCING 有权

    公开(公告)号：US20220349748A1

    公开(公告)日：2022-11-03

    申请号：US17245436

    申请日：2021-04-30

    Applicant: Texas Instruments Incorporated

    Inventor： Rakul VISWANATH ,  Sachin AITHAL

    IPC: G01J1/44

    Abstract: An analog front-end circuit includes an array of pixel circuits. Each pixel circuit includes an event counter and a power consumption circuit. The event counter is configured to count photons incident at the pixel circuit. The power compensation circuit includes an event rate circuit and a current sink circuit. The event rate circuit is configured to determine a rate of photon detection events at the pixel circuit. The current sink circuit is configured to pass a compensation current selected based on the rate of photon detection events at the pixel circuit.

    LOW POWER PHOTON COUNTING SYSTEM
    4.
    发明申请
    LOW POWER PHOTON COUNTING SYSTEM 审中-公开
    低功率光电计算系统

    公开(公告)号：US20170035376A1

    公开(公告)日：2017-02-09

    申请号：US14871245

    申请日：2015-09-30

    Applicant: Texas Instruments Incorporated

    Inventor： Nagesh SURENDRANATH ,  Rakul VISWANATH ,  Sandeep Kesrimal OSWAL

    IPC: A61B6/00 ,  A61B6/03 ,  G01T1/17

    CPC classification number: A61B6/4241 ,  A61B6/032 ,  A61B6/4208 ,  A61B6/4233 ,  G01T1/171 ,  G01T1/24

    Abstract: The disclosure provides a circuit that includes a charge sensitive amplifier (CSA) that generates an integrated signal in response to a current signal. An active comparator is coupled to the CSA. The active comparator receives the integrated signal and a primary reference voltage signal, and generates an event detect signal. A first delay element is coupled to the active comparator and provides a fixed delay to the event detect signal to generate a convert signal. A discriminator system is coupled to the CSA. The discriminator system samples the integrated signal when activated by the convert signal.

    Abstract translation: 本公开提供了一种电路，其包括响应于当前信号产生积分信号的电荷敏感放大器（CSA）。 有源比较器耦合到CSA。 有源比较器接收积分信号和主参考电压信号，并产生事件检测信号。 第一延迟元件耦合到有源比较器，并向事件检测信号提供固定延迟以产生转换信号。 鉴别器系统耦合到CSA。 鉴别器系统在通过转换信号激活时对积分信号进行采样。

    LEAKAGE COMPENSATION FOR A DETECTOR
    6.
    发明申请
    LEAKAGE COMPENSATION FOR A DETECTOR 审中-公开

    公开(公告)号：US20200264039A1

    公开(公告)日：2020-08-20

    申请号：US16277653

    申请日：2019-02-15

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Nagesh SURENDRANATH ,  Rakul VISWANATH

    IPC: G01J1/44 ,  H03F3/08 ,  H03F1/26

    Abstract: A circuit for use in a system that includes a detector, wherein the circuit comprises an input terminal to receive a detector signal from the detector external to the circuit, the detector signal to include an error charge corresponding to a leakage current. The circuit further comprises an amplifier coupled to the input terminal to receive input signals corresponding to the detector signal, including the error charge applied to an input of the amplifier. The circuit further comprises a feedback path coupled across the amplifier, wherein the feedback path comprises a first switch coupled across a leakage resistor and to a leakage capacitor for discharging a feedback compensation charge from the leakage capacitor and onto the input of the amplifier to substantially cancel the error charge.

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