公开(公告)号：US20210226660A1

公开(公告)日：2021-07-22

申请号：US16983719

申请日：2020-08-03

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Francesco DANTONI ,  Jawaharlal TANGUDU ,  Sarma Sundareswara GUNTURI ,  Robert Clair KELLER

IPC: H04B1/40 ,  H03F3/24 ,  H03F1/32

Abstract: A system includes: a host processor; a transceiver coupled to the host processor; and a power amplifier coupled to an output of the transceiver. The transceiver includes a transmit chain with digital pre-distortion (DPD) logic configured to: perform DPD correction operations on transmit data received by the transmit chain; and output corrected transmit data based on the performed DPD correction operations, wherein the output corrected transmit data is provided to the power amplifier.

公开(公告)号：US20220066975A1

公开(公告)日：2022-03-03

申请号：US17364672

申请日：2021-06-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Aravind GANESAN ,  Nagalinga Swamy Basayya AREMALLAPUR ,  Jaiganesh BALAKRISHNAN ,  Robert Clair KELLER

IPC: G06F13/42 ,  G06F13/16 ,  G06F1/12

Abstract: A circuit includes: a parallel data interface; and transition control circuitry coupled to the parallel data interface. The transition control circuitry is configured to: receive an input bit stream sample; determine a bit transformation pattern for the input bit stream sample in accordance with a target criteria; and generate an output bit stream symbol from the input bit stream sample and the bit transformation pattern, wherein the output bit stream symbol has more bits than the input bit stream sample.